US 10,241,972 B2Granted

Matrix multiplication on a systolic array

AssigneeInternational Business Machines Corporation

InventorsChia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Victor Han, Vijayalakshmi Srinivasan, Jintao Zhang

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Abstract

Techniques facilitating matrix multiplication on a systolic array are provided. A computer-implemented method can comprise populating, by a system operatively coupled to a processor, respective first registers of one or more processing elements of a systolic array structure with respective input data bits of a first data matrix. The one or more processing elements can comprise a first processing element that comprises a first input data bit of the first data matrix and a first activation bit of a second data matrix. The method can also include determining, by the system, at the first processing element, a first partial sum of a third data matrix. Further, the method can include streaming, by the system, the first partial sum of the third data matrix from the first processing element.

Claims19

Dependent claims

A system, comprising:

a memory that stores computer executable components;
and
a processor that executes the computer executable components stored in the memory, wherein the computer executable components comprise:
a load manager component that populates respective first registers of all processing elements of a systolic array structure with respective input data bits of a first data matrix, wherein the load manager component further inputs a first activation bit of a second data matrix into a first processing element of the processing elements, and the respective input data bits of the first data matrix are maintained in the respective first registers while a matrix multiplication of the first data matrix and the second data matrix is completed;
a computation component that determines, during the matrix multiplication, at the first processing element, a first partial sum of a third data matrix based on a first product of the first activation bit and a first input data bit of the first data matrix, and a first initial value of the third data matrix;
and
a shift manager component that streams, during the matrix multiplication, the first partial sum of the third data matrix along a first dimension to a second processing element of the processing elements.

4 more elements

A computer program product for facilitating matrix multiplication on a systolic array structure, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processing component to cause the processing component to:

populate respective first registers of all processing elements of the systolic array structure with respective input bits a first data matrix, and the respective input data bits of the first data matrix are maintained in the respective first registers while a matrix multiplication of the first data matrix and a second data matrix is completed;
determine, during the matrix multiplication, at a first processing element of the processing elements of the systolic array structure, a first partial sum of a third data matrix, wherein the first partial sum is based on a first activation bit of the second data matrix multiplied by a first input bit of the first data matrix, wherein the first input bit is stored in the first register of the first processing element;
and
stream, during the matrix multiplication, the first partial sum of the third data matrix to a second processing element of the processing elements, wherein the second processing element is located along a first dimension of the systolic array structure.

1 more element

Dependencies are inferred from the claim text.