Memory move supporting speculative acquisition of source and destination data granules including copy-type and paste-type instructions

A processing unit for a data processing system implementing a weak memory model, wherein the data processing system includes an interconnect fabric, the processing unit comprising:

• a processor core having a store-through upper level cache and a store-in lower level cache, wherein the lower level cache is configured to perform:
• receiving, from the processor core, a plurality of copy-type requests specifying addresses from which data is to copied and a plurality of paste-type requests specifying addresses to which the data is to be copied, wherein the plurality of copy-type requests and the plurality of paste-type requests together indicate a memory move to be performed;
• receiving, from the processor core, a barrier request that requests enforcement of ordering of memory access requests prior to the barrier request with respect to memory access requests after the barrier request;
• and
• prior to completion of processing of the barrier request by the lower level cache, speculatively issuing a request on the interconnect fabric to obtain a copy of a data granule specified by a particular copy-type request among the plurality of copy-type requests, wherein the particular copy-type request follows the barrier request in program order.

A design structure tangibly embodied in a computer-readable storage device for designing, manufacturing, or testing an integrated circuit, the design structure comprising:

• a processing unit for a data processing system implementing a weak memory model, wherein the data processing system includes an interconnect fabric, the processing unit comprising:
• a processor core having a store-through upper level cache and a store-in lower level cache, wherein the lower level cache is configured to perform:
• receiving, from the processor core, a plurality of copy-type requests and a plurality of paste-type requests specifying addresses to which the data is to be copied, wherein the plurality of copy-type requests and the plurality of paste-type requests together indicate a memory move to be performed;
• receiving, from the processor core, a barrier request that requests enforcement of ordering of memory access requests prior to the barrier request with respect to memory access requests after the barrier request;
• and
• prior to completion of processing of the barrier request by the lower level cache, speculatively issuing a request on the interconnect fabric to obtain a copy of a data granule specified by a particular copy-type request among the plurality of copy-type requests, wherein the particular copy-type request follows the barrier request in program order.