Power saving method and apparatus for first in first out (FIFO) memories
AssigneeIntel Corporation
InventorSutirtha Deb
Life of this patent
Estimating the term…
Abstract
In various embodiments, apparatuses and methods are disclosed to keep a memory clock gated when the data for a current memory address is the same as the data in the immediate previous memory address. For a write function, new data will only be written into the current memory address if it is different from the data in the immediate previous memory address. Similarly, for a read function, the data will only be read out of the current memory address if it is different from the data in the immediate previous memory address. Each row in the memory may have one associated status bit outside the memory. Data may only be written to or read from the current memory address when the status bit is set. Clock gating the memory ports may reduce the overall power consumption of the memory.
Claims25
An apparatus, comprising:
- a memory;
- and
- logic, at least a portion of the logic implemented in circuitry coupled to the memory, the logic to:
- receive new data for storage in a current memory address location;
- compare the new data to data stored in a previous memory address location;
- clear a status bit associated with the current memory address location when the new data matches the data stored in the previous memory address location;
- and
- set the status bit associated with the current memory address location when the new data is different than the data stored in the previous memory address location.
A method, comprising:
- receiving new data for storage in a current memory address location;
- comparing the new data to data stored in a previous memory address location;
- clearing a status bit associated with the current memory address location when the new data matches the data stored in the previous memory address location;
- and
- setting the status bit associated with the current memory address location when the new data is different than the data stored in the previous memory address location.
A system, comprising:
- a mobile computing device with a memory and logic, at least a portion of the logic implemented in circuitry coupled to the memory, the logic to:
- receive new data for storage in a current memory address location;
- compare the new data to data stored in a previous memory address location;
- clear a status bit associated with the current memory address location when the new data matches the data stored in the previous memory address location;
- and
- set the status bit associated with the current memory address location when the new data is different than the data stored in the previous memory address location.
Dependencies are inferred from the claim text.