Method to verify correctness of computer system software and hardware components and corresponding test environment

A system of facilitating computer system processing, the system comprising:

• a memory;
• and
• a processor communicatively coupled to the memory, the system performing:
• enhancing computer system test processing by establishing functional correctness of computer system components by comparing in operation a modified system version of a computer system with a verified system version of the computer system which functions correctly within a test environment, the test environment including an execution environment for running the modified system version and for running the verified system version, which are different system versions, each version comprising computer software components connected to computer hardware components, the computer hardware components comprising multiple target chips, the multiple target chips comprising a number of target chips which is consistent between each version, the establishing functional correctness being performed within the test environment and comprising:
• operating said test environment with said verified system version;
• monitoring and recording each hardware access during operation of said test environment with said verified system version to generate a corresponding verified trace file;
• operating said test environment with said modified system version;
• monitoring and recording each hardware access to generate a corresponding new trace file during operation of said test environment with said modified system version;
• defining an arbitrary chip order for evaluation of operations to the multiple target chips in said verified system version and the multiple target chips of the modified system version;
• sorting sequences of entries in both trace files according to said arbitrary chip order, including splitting the trace files into separate chip-based trace files;
• comparing said sorted, chip-based trace files by comparing, for each chip, their entries each by each to compare patterns of operations to the multiple target chips between the verified system version and the modified system version, and thus initialization sequences of the multiple target chips using the verified system version and the modified system version;
• and
• identifying functional correctness of the computer system components based on initialization sequences of the multiple target chips in the verified system version and in the modified system version matching.

A computer program product for facilitating computer system processing, the computer program product comprising:

• a computer-readable storage medium readable by a processor and storing instructions for execution by the processor for performing a method comprising:
• enhancing computer system test processing by establishing functional correctness of computer system components by comparing in operation a modified system version of a computer system with a verified system version of the computer system which functions correctly within a test environment, the test environment including an execution environment for running the modified system version and for running the verified system version, which are different system versions, each system version comprising computer software components connected to computer hardware components, the computer hardware components comprising multiple target chips, the multiple target chips comprising a number of target chips which is consistent between each version, the establishing functional correctness being performed within the test environment and comprising:
• operating said test environment with said verified system version;
• monitoring and recording each hardware access during operation of said test environment with said verified system version to generate a corresponding verified trace file;
• operating said test environment with said modified system version;
• monitoring and recording each hardware access to generate a corresponding new trace file during operation of said test environment with said modified system version;
• defining an arbitrary chip order for evaluations of operations to the multiple target chips in said verified system version and the multiple target chips of the modified system version;
• sorting sequences of entries in both trace files according to said arbitrary chip order, including splitting the trace files into separate chip-based trace files;
• and
• comparing said sorted, chip-based trace files by comparing, for each chip, their entries each by each to compare patterns of operations to the multiple target chips between the verified system version and the modified system version, and thus initialization sequences of the multiple target chips using the verified system version and the modified system version;
• and
• identifying functional correctness of the computer system components based on initialization sequences of the multiple target chips in the verified system version and in the modified system version matching.