Memory system and method of controlling nonvolatile memory
AssigneeToshiba Memory Corporation
InventorShinichi Kanno
Life of this patent
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Abstract
According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller manages a plurality of namespaces for storing a plurality of kinds of data having different update frequencies. The controller encodes write data by using first coding for reducing wear of a memory cell to generate first encoded data, and generates second encoded data to be written to the nonvolatile memory by adding an error correction code to the first encoded data. The controller changes the ratio between the first encoded data and the error correction code based on the namespace to which the write data is to be written.
Claims12
A memory system comprising:
- a nonvolatile memory;
- and
- a controller electrically connected to the nonvolatile memory and configured to:
- manage a plurality of areas of the nonvolatile memory, the areas including a first area for storing a first type of data and a second area for storing a second type of data having a lower update frequency than the first type of data,
- encode write data by using first coding for reducing wear of a memory cell to generate first encoded data,
- generate second encoded data by adding an error correction code to the first encoded data, the second encoded data including the first encoded data and the error correction code, and
- write the second encoded data to one of the first area and the second area,
- wherein the first encoded data corresponding to the first type has a first length and the error correction code corresponding to the first type has a second length, and wherein the first encoded data corresponding to the second type has a third length less than the first length and the error correction code corresponding to the second type has a fourth length greater than the second length.
A memory system comprising:
- a nonvolatile memory;
- and
- a controller electrically connected to the nonvolatile memory and configured to:
- logically divide the nonvolatile memory into a plurality of areas, the areas including a first area for storing a first type of data and a second area for storing a second type of data having a lower update frequency than the first type of data,
- encode write data by using first coding for reducing wear of a memory cell to generate first encoded data,
- generate second encoded data by adding an error correction code to the first encoded data, the second encoded data including the first encoded data and the error correction code, and
- write the second encoded data to one of the first area and the second area,
- wherein the first encoded data corresponding to the first type has a first length and the error correction code corresponding to the first type has a second length, and wherein the first encoded data corresponding to the second type has a third length less than the first length and the error correction code corresponding to the second type has a fourth length greater than the second length.
A method of controlling a nonvolatile memory, the method comprising:
- managing a plurality of areas of the nonvolatile memory, the areas including a first area for storing a first type of data and a second area for storing a second type of data having a lower update frequency than the first type of data;
- encoding write data by using first coding for reducing wear of a memory cell to generate first encoded data;
- generating second encoded data by adding an error correction code to the first encoded data, the second encoded data including the first encoded data and the error correction code;
- and
- writing the second encoded data to one of the first area and the second area,
- wherein the first encoded data corresponding to the first type has a first length and the error correction code corresponding to the first type has a second length, and wherein the first encoded data corresponding to the second type has a third length less than the first length and the error correction code corresponding to the second type has a fourth length greater than the second length.
Dependencies are inferred from the claim text.