Technique for reducing voltage droop by throttling instruction issue rate

A computer-implemented method for controlling a rate at which an instruction issue unit issues instructions to an execution pipeline, the method comprising:

• determining a first integer value that reflects a number of instructions issued by the instruction issue unit to the execution pipeline during a first cycle associated with the instruction issue unit;
• pushing the first integer value onto a history buffer that stores a plurality of integer values, wherein each integer value stored in the history buffer indicates a number of instructions issued by the instruction issue unit to the execution pipeline during a different previous cycle;
• determining that a sum of the integer values stored in the history buffer including the first integer value exceeds a first threshold value, wherein the first threshold value is adjusted from an updated value via an offset value;
• increasing the first threshold value by incrementing a moving average of the integer values stored in the history buffer, including the first integer value, by the offset value after a first interval has elapsed;
• and
• in response to determining that the sum of the integer values exceeds the first threshold value, preventing the instruction issue unit from issuing instructions during a second cycle associated with the instruction issue unit.

A subsystem configured to control a rate at which an instruction issue unit issues instructions to an execution pipeline, including:

• issue control circuitry configured to:
• determine a first integer value that reflects a number of instructions issued by the instruction issue unit to the execution pipeline during a first cycle associated with the instruction issue unit;
• push the first integer value onto a history buffer that stores a plurality of integer values, wherein each integer value stored in the history buffer indicates a number of instructions issued by the instruction issue unit to the execution pipeline during a different previous cycle;
• determine that a sum of the integer values stored in the history buffer including the first integer value exceeds a first threshold value, wherein the first threshold value is adjustable and is based on an offset value and a product of a contribution factor and the sum of the integer values stored in the history buffer;
• and
• in response to determining that the sum of the integer values exceeds the first threshold value, prevent the instruction issue unit from issuing instructions during a second cycle associated with the instruction issue unit.

A computing device configured to control a rate at which an instruction issue unit issues instructions to an execution pipeline, including:

• issue control circuitry configured to:
• determine a first integer value that reflects a number of instructions issued by the instruction issue unit to the execution pipeline during a first cycle associated with the instruction issue unit;
• push the first integer value onto a history buffer that stores a plurality of integer values, wherein each integer value stored in the history buffer indicates a number of instructions issued by the instruction issue unit to the execution pipeline during a different previous cycle;
• determine that a sum of the integer values stored in the history buffer including the first integer value exceeds a first threshold value, wherein the first threshold value is adjustable and is based on an offset value and a product of a contribution factor and the sum of the integer values stored in the history buffer;
• and
• in response to determining that the sum of the integer values exceeds the first threshold value, prevent the instruction issue unit from issuing instructions during a second cycle associated with the instruction issue unit.