Method to do control speculation on loads in a high performance strand-based loop accelerator

A method comprising:

• hoisting, in an execution sequence, a load instruction in a branch of a conditional statement above the conditional statement;
• inserting a speculation control of load (SCL) instruction in a complementary branch of the conditional statement, wherein the SCL instruction provides an indication of a real program order (RPO) of the load instruction before the load instruction was hoisted;
• executing the load instruction to perform a load and cause an entry for the load instruction to be inserted in an ordering buffer, wherein the entry for the load instruction includes the RPO of the load instruction and a result of the load;
• and
• executing the SCL instruction to locate the entry for the load instruction in the ordering buffer using the RPO of the load instruction provided by the SCL instruction and discard the entry for the load instruction from the ordering buffer.

A system comprising:

• a binary translator to hoist, in an execution sequence, a load instruction in a branch of a conditional statement above the conditional statement and insert a speculation control of load (SCL) instruction in a complementary branch of the conditional statement, wherein the SCL instruction provides an indication of a real program order (RPO) of the load instruction before the load instruction was hoisted;
• an ordering buffer;
• and
• a loop accelerator that includes a plurality of execution circuits, wherein an execution circuit from the plurality of execution circuits is to execute the load instruction to perform a load and cause an entry for the load instruction to be inserted in the ordering buffer, wherein the entry for the load instruction includes the RPO of the load instruction and a result of the load, and wherein the execution circuit is to execute the SCL instruction to locate the entry for the load instruction in the ordering buffer using the RPO of the load instruction provided by the SCL instruction and discard the entry for the load instruction from the ordering buffer.