Digital on-chip duty cycle monitoring device

An apparatus, comprising:

• an oscillator circuit configured to:
• receive an input clock signal and an inverse input clock signal;
• generate a first oscillator output signal with a frequency based on a duty cycle of the input clock signal;
• and
• generate a second oscillator output signal with a frequency based on a duty cycle of the inverse input clock signal;
• a counter circuit configured to:
• count oscillations of the first oscillator output signal for a specified time period;
• and
• count oscillations of the second oscillator output signal for the specified time period;
• and
• a control circuit configured to determine, based on the oscillations counted by the counter circuit for the specified time period, a duty cycle value indicative of the duty cycle of the input clock signal.

A system, comprising:

• a reference clock generator configured to generate a reference clock signal;
• a clock generation circuit, including a delay circuit, configured to generate a delayed clock signal based on the reference clock signal, wherein an amount of delay from the reference clock signal to the delayed clock signal is based on the delay circuit;
• a logic circuit configured to generate a composite signal based on the reference clock signal and the delayed clock signal;
• and
• a duty cycle monitor circuit configured to:
• receive the composite signal;
• generate an inverse composite signal;
• generate an oscillator output signal, wherein a frequency of the oscillator output signal is based on a duty cycle of a selected one of the composite signal or the inverse composite signal;
• count oscillations of the oscillator output signal for a first specified time period with the composite signal selected;
• count oscillations of the oscillator output signal for a second specified time period with the inverse composite signal selected;
• and
• determine, based on the oscillations counted during the first specified time period and the second specified time period, a duty cycle value indicative of the duty cycle of the composite signal.