Method, apparatus and system for dynamic clock frequency control on a bus
AssigneeIntel Corporation
InventorsDuane G. Quiet, Amit Kumar Srivastava, Kenneth P. Foust
Life of this patent
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Abstract
In one embodiment, an apparatus includes a clock control circuit to generate a clock signal for communication on an interconnect. The clock control circuit may be configured to receive an indication of a next device of a plurality of devices to be accessed and to dynamically update a control signal to cause the communication of the clock signal to be dynamically switched between a fixed clock frequency and a spread spectrum clock frequency based at least in part on the indication of communication to the next device. Other embodiments are described and claimed.
Claims22
An apparatus to control communication on an interconnect comprising:
- a host controller to couple to the interconnect to which a plurality of devices may be coupled, the host controller including:
- a first driver to drive first information onto the interconnect;
- a first receiver to receive second information from at least one of the plurality of devices via the interconnect;
- and
- a clock control circuit to generate a clock signal for communication on the interconnect, the clock control circuit to receive an indication of a next device of the plurality of devices to be accessed and to dynamically update a control signal to cause the communication of the clock signal to be dynamically switched between a fixed clock frequency and a spread spectrum clock frequency based at least in part on the indication of the next device.
At least one non-transitory computer readable storage medium comprising instructions that when executed enable a system to:
- access, via a host controller, a first clock control policy to determine an initial clock control policy for generation of a clock signal to be communicated on a bus;
- generate the clock signal according to the initial clock control policy and output the clock signal on the bus according to the initial clock control policy;
- identify a next device of a plurality of devices coupled to the bus that the host controller is to access;
- access, via the host controller, a clock control policy for the next device;
- and
- generate the clock signal according to the next device clock control policy and output the clock signal on the bus according to the next device clock control policy, to enable the host controller to communicate with the next device, wherein at least one of the initial clock control policy and the next device clock control policy comprises a spread spectrum clock policy.
A system for communicating on a bus comprising:
- a first device coupled to a host controller via the bus, wherein the first device is a first distance from the host controller and associated with a first clock control policy;
- a second device coupled to the host controller via the bus and associated with a second clock control policy, wherein the second device is a second distance from the host controller, the second distance greater than the first distance;
- and
- the host controller having a clock control circuit to identify that the second device has information to send to the host controller via the bus, and dynamically control a clock signal based on the second clock control policy in response to the identification of the second device.
Dependencies are inferred from the claim text.