Flipped gate voltage reference having boxing region and method of using

A voltage reference comprising:

• a first current mirror circuit configured to receive a first bias current and to generate a first current and a mirroring current;
• a second current mirror circuit configured to receive the mirroring current as a second bias current and to generate a second current;
• a flipped gate transistor;
• a first transistor, a gate of the first transistor connected to the flipped gate transistor, wherein the first transistor has a first leakage current;
• an output node configured to output a reference voltage, the output node connected to the first transistor;
• a second transistor connected to the output node, the second transistor having a second leakage current;
• and
• a boxing circuit configured to offset the first leakage current with the second leakage current by providing a voltage level at a drain terminal of the first transistor.

A method of using a voltage reference, the method comprising:

• mirroring a first bias current to generate a first current across a flipped gate transistor and to generate a mirroring current;
• receiving the mirroring current as a second bias current;
• mirroring the second bias current to generate a second current across a first transistor and to generate a boxing current, wherein the first transistor has a first leakage current;
• compensating for the first leakage current using a second transistor, the second transistor having a second leakage current;
• boxing a voltage received by the first transistor using the second current and the boxing current, wherein boxing the voltage comprises offsetting the first leakage current with the second leakage current;
• and
• outputting a reference voltage.