Planar photonic switch fabrics with reduced waveguide crossings

A computer-implemented method, comprising:

• arranging, by a system operatively coupled to a processor, a first planar switch fabric topology with a defined amount of waveguides between a plurality of inputs of the first planar switch fabric topology and a plurality of outputs of the first planar switch fabric topology;
• and
• interleaving, by the system, a plurality of inputs of the first planar switch fabric topology and a plurality of outputs of the first planar switch fabric topology to form a second planar switch fabric topology, the second planar switch fabric topology having a lower number of waveguide crossings of the waveguides than the first planar switch fabric topology, wherein the second planar switch fabric topology has the defined amount of waveguides.

A computer program product that facilitates implementation of planar photonic switch fabrics with reduced waveguide crossings, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions being executable by a processor to cause the processor to:

• arrange a first planar switch fabric topology with a defined amount of waveguides between a plurality of inputs of the first planar switch fabric topology and a plurality of outputs of the first planar switch fabric topology;
• and
• interleave a plurality of inputs of the first planar switch fabric topology and a plurality of outputs of the first planar switch fabric topology to form a second planar switch fabric topology, the second planar switch fabric topology having a lower number of waveguide crossings of the waveguides than the first planar switch fabric topology, wherein the second planar switch fabric topology has the defined amount of waveguides.