Printed wiring board

A printed wiring board, comprising:

• a first conductor layer;
• a first resin insulating layer formed on the first conductor layer;
• a second conductor layer formed on the first resin insulating layer and including a first conductor circuit and a second conductor circuit;
• a second resin insulating layer formed on the first resin insulating layer such that the second resin insulating layer is covering the second conductor layer;
• a third conductor layer formed on the second resin insulating layer and including a first conductor circuit and a second conductor circuit;
• a third resin insulating layer formed on the second resin insulating layer such that the third resin insulating layer is covering the third conductor layer;
• a fourth conductor layer formed on the third resin insulating layer and including a first conductor circuit;
• a first via conductor formed through the first resin insulating layer such that the first via conductor is connecting the first and second conductor layers;
• a second via conductor formed in a second via opening extending through the second resin insulating layer such that the second via conductor is connecting the first conductor circuits in the second conductor layer and the third conductor layer;
• and
• a first skip via conductor formed in a first skip via opening extending through the second and third resin insulating layers such that the first skip via conductor is penetrating through the second conductor circuit in the third conductor layer and connecting the second conductor circuit in the second conductor layer and the first conductor circuit in the fourth conductor layer,
• wherein the second and third conductor layers are formed such that the second conductor layer has a thickness t2 which is larger than a thickness t3 of the third conductor layer, and the second conductor circuit in the second conductor layer is a dummy circuit structure formed such that the second conductor circuit in the second conductor layer is not connected to other conductor circuits in the second conductor layer and is not connected to the first conductor layer.