Digital low drop-out regulator and operation method thereof

A digital Low Drop-Out (LDO) regulator, comprising:

• an event-driven circuit for generating a trigger signal by asynchronously detecting whether an output voltage is out of a threshold range or not, and generating a first error information signal and a first control signal based on the trigger signal;
• a time-driven circuit for generating a second error information signal by detecting a change in the output voltage in synchronization with a clock signal, and generating a second control signal by combining the first and second error information signals;
• a clock/trigger control circuit for generating the clock signal having a first cycle or a second cycle based on the trigger signal and the first and second error information signals;
• a first array driver for controlling a driving force of the is output voltage in response to the first control signal;
• and a second array driver for controlling the driving force of the output voltage in response to the second control signal.