Techniques for amplifier output voltage limiting
AssigneeAnalog Devices, Inc.
InventorKerry Brent Phillips
Life of this patent
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Abstract
Techniques for limiting the output voltage of an amplifier without directly affecting an output current of the amplifier are provided. In an example, an amplifier can include a plurality of amplifier stages configured to receive an input voltage and to provide an output voltage as a function of the input voltage, and a comparator configured to receive a voltage limit and a representation of the output voltage of the amplifier, to adjust current at an input to a first amplifier stage of the plurality of amplifier stages when the output voltage violates the voltage limit, and to clamp the output voltage at an offset from the voltage limit.
Claims20
An amplifier configured to clamp an output voltage based on a voltage limit without requiring alteration of an output current of the amplifier to maintain a clamped output condition, the amplifier comprising:
- a plurality of amplifier stages configured to receive an input voltage and to provide the output voltage as a function of the input voltage;
- and
- a comparator configured to receive the voltage limit and a representation of the output voltage of the amplifier, to adjust current at an input to a first amplifier stage of the plurality of amplifier stages when the output voltage violates the voltage limit, and to clamp the output voltage at an offset from the voltage limit.
A method for limiting an output voltage of an amplifier without requiring alteration of an output current of the amplifier to maintain a clamped output condition, the method comprising:
- amplifying an input voltage using an amplifier stage of the amplifier to provide an output voltage;
- receiving a voltage limit;
- offsetting the voltage limit to provide an offset voltage limit;
- comparing a representation of the output voltage to the offset voltage limit;
- and
- adjusting an input current of the amplifier stage when the output voltage violates the offset voltage limit.
A system for limiting an input voltage of an analog-to-digital converter (ADC), the system comprising:
- the ADC;
- and
- an amplifier having an output coupled to an input of the ADC, the amplifier including:
- a plurality of amplifier stages configured to receive an input voltage and to provide an output voltage as a function of the input voltage;
- and
- a comparator configured to receive a voltage limit and a representation of the output voltage of the amplifier, to adjust current at an input to a first amplifier stage of the plurality of amplifier stages when the output voltage violates the voltage limit, and to clamp the output voltage at an offset from the voltage limit.
Dependencies are inferred from the claim text.