Interpolator
AssigneeVia Alliance Semiconductor Co., Ltd.
InventorYeong-Sheng Lee
Life of this patent
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Abstract
An interpolator includes a first delay circuit, a second delay circuit, and a tunable delay circuit. The first delay circuit delays a first input signal for a fixed delay time, so as generate a first output signal. The second delay circuit delays a second input signal for the fixed delay time, so as to generate a second output signal. The tunable delay circuit delays the first input signal for a tunable delay time, so as to generate an output interpolation signal. The tunable delay time is determined according to the first output signal, the second output signal, and the output interpolation signal.
Claims14
An interpolator, comprising:
- a first delay circuit, delaying a first input signal for a fixed delay time, so as to generate a first output signal;
- a second delay circuit, delaying a second input signal for the fixed delay time, so as to generate a second output signal;
- and
- a tunable delay circuit, delaying the first input signal for a tunable delay time, so as to generate an output interpolation signal, wherein the tunable delay time is determined according to the first output signal, the second output signal, and the output interpolation signal,
- wherein the first output signal, the second output signal, and the output interpolation signal have the same frequency, and a phase of the first output signal leads a phase of the second output signal, and a phase of the output interpolation signal is between the phase of the first output signal and the phase of the second output signal;
- wherein the tunable delay circuit comprises a tunable unit which is formed by cascading a tunable inverter and a fixed inverter, wherein the tunable inverter is controlled by the first output signal, the second output signal, and the output interpolation signal.
Dependencies are inferred from the claim text.