Package-on-package stacked microelectronic structures

A method of forming a package-on-package stacked microelectronic structure, comprising:

• forming a first microelectronic package, comprising a substrate having a first surface and at least one package connection bond pad formed on each microelectronic package substrate first surface;
• electrically connecting at least one first microelectronic device to the microelectronic package substrate first surface;
• forming a second microelectronic package, comprising a substrate having a first surface and at least one package connection bond pad formed on each microelectronic package substrate first surface;
• electrically connecting at least one second microelectronic device to the second microelectronic package substrate first surface;
• electrically connecting at least one third microelectronic device and one fourth microelectronic device to the second microelectronic package substrate second surface, the at least one third and one fourth microelectronic devices co-planar with one another on the second microelectronic package substrate second surface, and the at least one third and one fourth microelectronic devices electrically coupled to the at least one second microelectronic device of the second microelectronic package by conductive routes through the second microelectronic package substrate, wherein a first of the conductive routes couples a first microelectronic device of the at least one third and one fourth microelectronic devices to a microelectronic device of the at least one second microelectronic device, and a second of the conductive routes couples a second microelectronic device of the at least one third and one fourth microelectronic devices to the microelectronic device of the at least one second microelectronic device;
• orienting the second microelectronic package first surface to face the first microelectronic package first surface;
• and
• forming at least one package-to-package interconnection structure between the first microelectronic package connection bond pad and the second microelectronic package connection bond pad.

A computing device, comprising:

• a board;
• and
• a package-on-package stacked microelectronic structure attached to the board, wherein the package-on-package stacked microelectronic structure comprises:
• a first microelectronic package, comprising a substrate having a first surface and at least one package connection bond pad formed on the microelectronic package substrate first surface, and having at least one microelectronic device electrically connected to the microelectronic package substrate first surface;
• a second microelectronic package, comprising a substrate having a first surface and at least one package connection bond pad formed on the second microelectronic package substrate first surface, and having at least one microelectronic device electrically connected to the second microelectronic package substrate first surface, and having at least two microelectronic devices electrically connected to the second microelectronic package substrate second surface, the at least two microelectronic devices co-planar with one another on the second microelectronic package substrate second surface, and the at least two microelectronic devices electrically coupled to the at least one microelectronic device of the second microelectronic package by conductive routes through the second microelectronic package substrate, wherein a first of the conductive routes couples a first microelectronic device of the at least two microelectronic devices to a microelectronic device of the at least one microelectronic device, and a second of the conductive routes couples a second microelectronic device of the at least two microelectronic devices to the microelectronic device of the at least one microelectronic device;
• and
• at least one package-to-package interconnection structure extending between the first microelectronic package connection bond pad and the second microelectronic package connection bond pad.