Back to results
US 10,205,460 B2Granted
Fractional-N frequency synthesizer and method thereof
AssigneeBeken Corporation
InventorsDawei Guo, Caogang Yu
Life of this patent
Estimating the term…
Abstract
A fractional-N frequency synthesizer comprising a multi-phase generator, a multi-path error phase generator; a current combiner; a loop filter connected to the current combiner; an oscillator (150) connected to the loop filter; a frequency divider (160); a SDM connected to both the frequency divider and the multi-phase generator, to generate variable division ratio.
Claims10
A fractional-N frequency synthesizer comprising:
- a multi-phase generator configured to generate multiple phase delayed sequences based on an output sequence from a sigma-delta modulator (SDM),
- a signal processing module configured to calculate a phase difference sequence between each of the multiple delayed sequences and a non-delayed sequence;
- a multi-path error phase generator connected to the multi-phase generator, configured to generate a plurality of phase difference signals by comparing the phase of each of the phase difference sequence with the phase of a common reference signal;
- a current combiner connected to the error phase generator and configured to generate a sum of a plurality of charge pump output signals by weighted summing of the plurality of charge pump output signals sourced by each branch within a time window defined by the phase difference sequence;
- a loop filter connected to the current combiner, and configured to generate a voltage signal by filtering the sum of the plurality of charge pump output signals;
- an oscillator connected to the loop filter and configured to generate an oscillating voltage signal (CKVCO) according to the voltage signal from the loop filter;
- a frequency divider configured to sense the oscillating voltage signal and generate a divided signal (CKDIV) by counting pulses of the oscillating voltage signal;
- a SDM connected to both the frequency divider and the multi-phase generator, to generate variable division ratio (Ndiv).
5 more elements
A method in a fractional-N division frequency synthesizer comprising:
- generating, by a multi-phase generator, multiple phase delayed sequences based on an output sequence from a sigma-delta modulator (SDM), and
- calculating, by a signal processing module, a phase difference sequence between each of the multiple delayed sequences and a non-delayed sequence;
- generating, by a multi-path error phase generator, a plurality of phase difference signals by comparing the phase of each of the phase difference sequence the phase of a common reference signal;
- generating, by a current combiner, a sum of a plurality of charge pump output signals by weighed summing of the plurality of charge pump output signals sourced by each branch within a time window defined by the phase difference sequence;
- generating, by a loop filter, a voltage signal by filtering the sum of the plurality of charge pump output signals;
- generating, by an oscillator, an oscillating voltage signal (CKVCO) according to the voltage signal from the loop filter;
- generating, by a frequency divider, a signal (CKDIV) by sensing the oscillator output and counting pulses of the oscillating signal;
- and
- generating variable division ratio by the SDM, wherein the SDM is connected to both the frequency divider and the multi-phase generator.
6 more elements
Dependencies are inferred from the claim text.