Zero-misalignment via-pad structures
AssigneeIntel Corporation
InventorsBrandon M. Rawlings, Henning Braunisch
Life of this patent
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Abstract
A photoresist is deposited on a seed layer on a substrate. A first region of the photoresist is removed to expose a first portion of the seed layer to form a via-pad structure. A first conductive layer is deposited onto the first portion of the seed layer. A second region of the photoresist adjacent to the first region is removed to expose a second portion of the seed layer to form a line. A second conductive layer is deposited onto the first conductive layer and the second portion of the seed layer.
Claims10
An apparatus to manufacture an electronic device, comprising
- a via-pad structure over a first portion of a seed layer on a substrate;
- and
- a conductive line adjacent to the via-pad structure over a second portion of a substrate, wherein the via-pad structure comprises:
- a lower portion of a first conductive layer that represents a pad portion, and a first portion of a second conductive layer on an upper portion of the first conductive layer that represents a via portion, wherein a size of the pad portion and the size of the via portion are substantially similar.
An apparatus to provide zero misalignment via-pad structures, comprising:
- a via-pad structure comprising:
- a first conductive layer on a first portion of a seed layer on a substrate, wherein a lower portion of the first conductive layer represents a pad portion;
- and a first portion of a second conductive layer on an upper portion of the first conductive layer represents a via portion;
- and
- a conductive line comprising a second portion of the second conductive layer on a second portion of the seed layer on the substrate adjacent to the via-pad structure, wherein a size of the pad portion and the size of the via portion are substantially similar.
Dependencies are inferred from the claim text.