Semiconductor device including a resonant tunneling diode structure with electron mean free path control layers

A semiconductor device comprising:

• at least one double-barrier resonant tunneling diode (DBRTD) comprising
• a first doped semiconductor layer,
• a first barrier layer on the first doped semiconductor layer and comprising a first superlattice, the first superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base semiconductor portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions,
• a first intrinsic semiconductor layer on the first barrier layer,
• a second barrier layer on the first intrinsic semiconductor layer and comprising a second superlattice, the second superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions,
• a second intrinsic semiconductor layer on the second barrier layer,
• a third barrier layer on the second intrinsic semiconductor layer and comprising a third superlattice, the third superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions,
• a third intrinsic semiconductor layer on the third barrier layer,
• a fourth barrier layer on the third intrinsic semiconductor layer, and
• a second doped semiconductor layer on the fourth layer, the first and second doped semiconductor layers having a same dopant conductivity type.

A semiconductor device comprising:

• at least one double-barrier resonant tunneling diode (DBRTD) comprising
• a first doped semiconductor layer,
• a first barrier layer on the first doped semiconductor layer and comprising a first superlattice, the first superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base semiconductor portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions,
• a first intrinsic semiconductor layer on the first barrier layer,
• a second barrier layer on the first intrinsic semiconductor layer and comprising a second superlattice, the second superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base semiconductor portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions,
• a second intrinsic semiconductor layer on the second barrier layer,
• a third barrier layer on the second intrinsic semiconductor layer and comprising a third superlattice, the third superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base semiconductor portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions,
• a third intrinsic semiconductor layer on the third barrier layer,
• a fourth barrier layer on the third intrinsic semiconductor layer, and
• a second doped semiconductor layer on the fourth barrier layer, the first and second doped semiconductor layers having opposite dopant conductivity types.