Fast settling capacitive gain amplifier circuit
AssigneeAnalog Devices Global
InventorsHanqing Wang, Gerard Mora-Puchalt
Life of this patent
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Abstract
A capacitive gain amplifier circuit amplifies an input signal by a pair of differential amplifier circuits couples in series. The first differential amplifier circuit is reset during an autozero phase while disconnected from the second differential amplifier circuit, and the first and second differential amplifier circuits are connected together in series during a chop phase. A set of feedback capacitors is selectively switched in between respective outputs of the second differential amplifier circuit and respective inputs of the first differential amplifier circuit during the chop phase.
Claims20
A capacitive gain amplifier circuit to amplify an input signal by a pair of differential amplifier circuits coupled in series, the capacitive gain amplifier comprising:
- a first differential amplifier circuit, including a set of inputs and a set of outputs;
- a second differential amplifier circuit, including a set of inputs and a set of outputs;
- a first set of switches to selectively disconnect the second differential amplifier circuit from the first differential amplifier circuit during a first phase, and selectively connect the second differential amplifier circuit with the first differential amplifier circuit in series during a second phase that amplifies a signal by the first differential amplifier circuit and the second differential amplifier circuit together in series;
- and
- a set of feedback capacitors, selectively switched in between respective outputs of the second differential amplifier circuit and respective inputs of the first differential amplifier circuit during the second phase.
A method of capacitive gain amplification using a first differential amplifier circuit selectively coupled in series with a second differential amplifier circuit, the method comprising:
- selectively disconnecting the second differential amplifier circuit from the first differential amplifier circuit by a first set of switches during a first phase;
- selectively connecting the second differential amplifier circuit with the first differential amplifier circuit in series by the first set of switches during a second phase that amplifies a signal by the first differential amplifier circuit and the second differential amplifier circuit together in series;
- and
- selectively switching in a set of feedback capacitors between respective outputs of the second differential amplifier circuit and respective inputs of the first differential amplifier circuit during the second phase.
A capacitive gain amplifier circuit to amplify an input signal by a pair of differential amplifier circuits coupled in series, the capacitive gain amplifier circuit comprising:
- a first differential amplifier circuit;
- a second differential amplifier circuit;
- a set of input capacitors coupled with respective inputs of the first differential amplifier circuit, the set of input capacitors having inputs selectively switched to provide a common mode input voltage to the set of inputs of the first differential amplifier circuit during a first phase that resets the first differential amplifier circuit, and to provide a differential input voltage from respective inputs of the capacitive gain amplifier circuit to the set of inputs of the first differential amplifier circuit during a second phase that amplifies a signal by the first differential amplifier circuit and the second differential amplifier circuit together in series;
- a set of Miller capacitors configured to couple between respective outputs and respective inputs of the second differential amplifier circuit;
- and
- a set of first switches to couple the set of outputs of the second differential amplifier circuit with a set of inputs of an analog to digital converter (ADC) circuit to at least partially charge the set of inputs of the ADC circuit during the first phase.
Dependencies are inferred from the claim text.