Device and method for protecting FEOL element and BEOL element
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsPing Chun Yeh, Lien-Yao Tsai, Shao-Chi Yu
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Abstract
A device includes a complementary metal-oxide-semiconductor (CMOS) wafer and a conductive shielding layer. The CMOS wafer includes a semiconductor substrate, at least one front-end-of-the-line (FEOL) element, at least one back-end-of-the-line (BEOL) element and at least one dielectric layer. The FEOL element is disposed on the semiconductor substrate, the dielectric layer is disposed on the semiconductor substrate, and the BEOL element is disposed on the dielectric layer. The conductive shielding layer is disposed on the dielectric layer, in which the conductive shielding layer is electrically connected to the semiconductor substrate.
Claims20
A semiconductor device, comprising:
- a complementary metal-oxide-semiconductor (CMOS) device comprising:
- a semiconductor substrate;
- at least one front-end-of-the-line (FEOL) element disposed on the semiconductor substrate;
- and at least one back-end-of-the-line (BEOL) element;
- a conductive shielding layer disposed on the CMOS device and arranged to at least protectively cover the FEOL element and the BEOL element, the conductive shielding layer electrically connected to ground, wherein an orthogonal projection of the conductive shielding layer on the semiconductor substrate overlaps with an orthogonal projection of the FEOL element on the semiconductor substrate;
- and
- an inter-layer dielectric (ILD) layer which is disposed on the conductive shielding layer of the CMOS device and covers the conductive shielding layer.
A semiconductor device, comprising:
- a complementary metal-oxide-semiconductor (CMOS) device comprising:
- a semiconductor substrate;
- a front-end-of-the-line (FEOL) element disposed on the semiconductor substrate;
- a plurality of dielectric layers disposed on the semiconductor substrate;
- and
- a back-end-of-the-line (BEOL) element disposed in the dielectric layers;
- a first interconnect structure disposed through the dielectric layers;
- a conductive shielding layer disposed on the dielectric layers and arranged to at least protectively cover the FEOL element and the BEOL element, wherein the conductive shielding layer is ground to the semiconductor substrate through the first interconnect structure, and an orthogonal projection of the conductive shielding layer on the semiconductor substrate overlaps with an orthogonal projection of the BEOL element on the semiconductor substrate;
- an inter-layer dielectric (ILD) layer which is disposed on the conductive shielding layer and covers the conductive shielding layer;
- and
- a micro electromechanical system (MEMS) device disposed on the ILD layer, wherein the MEMS device comprises a second interconnect structure electrically connected to the conductive shielding layer.
A method for forming a semiconductor device, comprising:
- forming a complementary metal-oxide-semiconductor (CMOS) device comprising:
- a semiconductor substrate;
- a front-end-of-the-line (FEOL) element disposed on the semiconductor substrate;
- and a back-end-of-the-line (BEOL) element;
- forming a conductive shielding layer on the CMOS device to at least protectively cover the FEOL element and the BEOL element, wherein the conductive shielding layer is electrically connected to ground, and an orthogonal projection of the conductive shielding layer on the semiconductor substrate overlaps with an orthogonal projection of the FEOL element on the semiconductor substrate;
- and
- forming an inter-layer dielectric (ILD) layer on the conductive shielding layer of the CMOS device to cover the conductive shielding layer.
Dependencies are inferred from the claim text.