Fan-out package structure
AssigneeMediatek Inc.
InventorsMin-Chen Lin, Che-Ya Chou, Nan-Cheng Chen
Life of this patent
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Abstract
A semiconductor package structure including a redistribution layer (RDL) structure having a first surface and a second surface opposite thereto is provided. The RDL structure includes an inter-metal dielectric (IMD) layer and a first conductive layer disposed at a first layer-level of the IMD layer. A molding compound covers the first surface of the RDL structure. A first semiconductor die is disposed over the second surface of the RDL structure and electrically coupled to the RDL structure. A plurality of bump structures is disposed over the second surface of the RDL structure and electrically coupled to the RDL structure.
Claims15
A semiconductor package structure, comprising:
- a redistribution layer (RDL) structure having a first surface and a second surface opposite thereto, wherein the RDL structure comprises:
- an inter-metal dielectric (IMD) layer;
- a first conductive layer disposed at a first layer-level of the IMD layer;
- and
- a second conductive layer disposed at a second layer-level below the first layer-level of the IMD layer, wherein the second conductive layer has a ground shielding pattern;
- a molding compound covering the first surface of the RDL structure;
- a first semiconductor die disposed over the second surface of the RDL structure and electrically coupled to the RDL structure, wherein a surface of the first semiconductor die is entirely covered by the ground shielding pattern;
- and
- a plurality of bump structures disposed over the second surface of the RDL structure and electrically coupled to the RDL structure.
A semiconductor package structure, comprising:
- a redistribution layer (RDL) structure having a first surface and a second surface opposite thereto, wherein the RDL structure comprises:
- an inter-metal dielectric (IMD) layer;
- a first conductive layer disposed at a first layer-level of the IMD layer, wherein the first conductive layer has an antenna pattern;
- a second conductive layer disposed at a second layer-level below the first layer-level of the IMD layer, wherein the second conductive layer has a ground shielding pattern;
- and
- a third conductive layer disposed at a third layer-level below the second layer-level of the IMD layer;
- a molding compound covering the first surface of the RDL structure;
- a first semiconductor die disposed over the second surface of the RDL structure and electrically coupled to the RDL structure, wherein a surface of the first semiconductor die is entirely covered by the ground shielding pattern;
- and
- a plurality of bump structures disposed over the second surface of the RDL structure and electrically coupled to the RDL structure.
Dependencies are inferred from the claim text.