# US 10,122,413 B2 · Power over data lines system using voltage clamp in PD for detection or classification

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- Number: US 10,122,413 B2
- Document ID: US10122413B2
- Status: Granted
- Kind: B2
- Application number: 15/587,324
- Filed: 2017-05-04
- Published: 2017-08-17
- Granted: 2018-11-06
- Earliest claimed: 2013-11-26
- Assignees: Linear Technology Corporation
- Applicants: Linear Technology Corporation
- Inventors: Jeffrey Heath; David Dwelley
- Web page: https://patentgrep.com/patent/US10122413B2

## CPC

- H04B 3/56: Circuits for coupling, blocking, or by-passing of signals
- H02J 3/12: Arrangements for adjusting voltage in AC networks by changing a characteristic of the network load
- H04L 12/10: Current supply arrangements
- H04L 12/40045: {Details regarding the feeding of energy to the node from the bus}
- H04B: TRANSMISSION
- H02J: ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

A PoDL system includes a PSE connected via a wire pair to a PD, where differential data and DC power are transmitted over the same wire pair. Typically, low voltage/current detection and classification routines are required upon every powering up of the system to allow the PD to convey its PoDL requirements to the PSE. Various techniques are described that simplify or obviate such start-up routines or enable increased flexibility for the PoDL system. Such techniques include: ways to specify a particular PD operating voltage; ways to disable the PD's UVLO circuit during such routines; using opposite polarity voltages for the two routines; using voltage limiters or surge protectors to convey the PoDL information; detecting loop resistance; using a PSE memory to store previous results of the routines; and powering the PD communication circuit using the wire pair while the PD load is powered by an alternate power source.

## Claims

### Claim 1

A Power Over Data Lines (PoDL) system comprising:
Power Source Equipment (PSE) coupled to a Powered Device (PD) via a wire pair, wherein differential data signals and DC power for operating the PD are transmitted over the same wire pair;
a PSE controller and a PD controller configured to carry out a low power handshaking phase over the wire pair, the handshaking phase providing a first signature signal from the PD to the PSE to identify whether the PD is compatible for receiving an operating voltage over the wire pair or to identify a particular voltage requirement of the PD or to identify a maximum power level of the PD;
a voltage limiting circuit across the wire pair that limits a voltage across the wire pair to a predetermined magnitude, wherein the voltage of the predetermined magnitude provides the first signature signal;
a current source in the PSE coupled to the wire pair for conducting a current through the voltage limiting circuit to cause the voltage limiting circuit to generate the first signature signal of the PD; and
a first detector in the PSE coupled to the wire pair and configured to detect the first signature signal on the wire pair to identify a particular voltage requirement of the PD or to identify a maximum power level of the PD.

### Claim 2 (depends on 1)

The system of claim 1 further comprising:
a processing circuit in the PSE configured to associate the first signature signal with certain PoDL characteristics of the PD; and
a power source in the PSE controlled by the PSE in response to the first signature signal to supply power to the PD via the wire pair consistent with the first signature signal.

### Claim 3 (depends on 1)

The system of claim 1 wherein the current source generates a fixed current, and wherein the voltage limiting circuit is a Zener diode coupled across the wire pair.

### Claim 4 (depends on 1)

The system of claim 1 further comprising an Undervoltage Lockout (UVLO) circuit in the PD configured to detect a DC voltage on the wire pair and determine whether the voltage is above a threshold voltage,
wherein the UVLO circuit is configured to couple the voltage above the threshold level to a PD load after the handshaking phase, and
wherein the UVLO circuit is configured to prevent coupling the voltage above the threshold level to the PD load if the voltage above the threshold level occurs during the handshaking phase.

### Claim 5 (depends on 1)

The system of claim 1 wherein the first signature signal identifies to the PSE controller during the handshaking phase that the PD is compatible for receiving an operating voltage over the wire pair.

### Claim 6 (depends on 1)

The system of claim 1 wherein the first signature signal identifies to the PSE controller the maximum power level of the PD.

### Claim 7 (depends on 1)

The system of claim 1 wherein the voltage limiting circuit comprises a Zener diode.

### Claim 8 (depends on 1)

The system of claim 1 wherein the first detector is configured to digitize the first signature signal to generate a digitized signal and use the digitized signal to look up PoDL characteristics of the PD.

### Claim 9

A Power Over Data Lines (PoDL) system comprising:
Power Source Equipment (PSE) coupled to a Powered Device (PD) via a wire pair, wherein differential data signals and DC power are transmitted over the same wire pair;
a PSE controller and a PD controller configured to carry out a low power handshaking phase over the wire pair, the handshaking phase providing a first signature signal from the PD to the PSE to identify whether the PD is compatible for receiving an operating voltage over the wire pair or to identify a particular voltage requirement of the PD or to identify a maximum power level of the PD;
a voltage limiting circuit across the wire pair that limits a voltage across the wire pair to a predetermined magnitude, wherein the voltage of the predetermined magnitude provides the first signature signal;
a current source in the PSE coupled to the wire pair for conducting a current through the voltage limiting circuit to cause the voltage limiting circuit to generate the first signature signal of the PD;
a first detector in the PSE coupled to the wire pair and configured to detect the first signature signal on the wire pair;
a processing circuit in the PSE configured to control the current source to apply a first current I1 to the wire pair;
a first detector in the PSE configured to detect the voltage V1 across the wire pair in response to the first current I1 while the voltage limiting circuit limits the voltage across the wire pair;
the processing circuit in the PSE configured to control the current source to also apply a second current I2 to the wire pair;
the first detector in the PSE configured to detect the voltage V2 across the wire pair in response to the second current I2 while the voltage limiting circuit limits the voltage across the wire pair;
the processing circuit configured to calculate a resistance R of the wire pair using V1, V2, I1, and 12;
the processing circuit configured to calculate voltage drop Vd along the wire pair at any current I by Vd=I*R; and
a power source in the PSE controlled by the PSE to supply a voltage on the wire pair for powering the PD, wherein the power source is adjusted to take into account the voltage drop along the wire pair when supplying the voltage on the wire pair.

### Claim 10

A Power Over Data Lines (PoDL) system comprising:
Power Source Equipment (PSE) coupled to a Powered Device (PD) via a wire pair, wherein differential data signals and DC power are transmitted over the same wire pair;
a PSE controller and a PD controller configured to carry out a low power handshaking phase over the wire pair, the handshaking phase providing a first signature signal from the PD to the PSE to identify whether the PD is compatible for receiving an operating voltage over the wire pair or to identify a particular voltage requirement of the PD or to identify a maximum power level of the PD;
a voltage limiting circuit across the wire pair that limits a voltage across the wire pair to a predetermined magnitude, wherein the voltage of the predetermined magnitude provides the first signature signal;
a current source in the PSE coupled to the wire pair for conducting a current through the voltage limiting circuit to cause the voltage limiting circuit to generate the first signature signal of the PD;
a first detector in the PSE coupled to the wire pair and configured to detect the first signature signal on the wire pair; and
a detector circuit in the PD that isolates the PD controller from the voltage limiting circuit during the handshaking phase so the first signature signal is not affected by the PD controller.

### Claim 11

A Power Over Data Lines (PoDL) system comprising:
Power Source Equipment (PSE) coupled to a Powered Device (PD) via a wire pair, wherein differential data signals and DC power are transmitted over the same wire pair;
a PSE controller and a PD controller configured to carry out a low power handshaking phase over the wire pair, the handshaking phase providing a first signature signal from the PD to the PSE to identify whether the PD is compatible for receiving an operating voltage over the wire pair or to identify a particular voltage requirement of the PD or to identify a maximum power level of the PD;
a voltage limiting circuit across the wire pair that limits a voltage across the wire pair to a predetermined magnitude, wherein the voltage of the predetermined magnitude provides the first signature signal;
a current source in the PSE coupled to the wire pair for conducting a current through the voltage limiting circuit to cause the voltage limiting circuit to generate the first signature signal of the PD; and
a first detector in the PSE coupled to the wire pair and configured to detect the first signature signal on the wire pair;
wherein the first signature signal identifies to the PSE controller the particular voltage requirement of the PD.

### Claim 12

A Power Over Data Lines (PoDL) system comprising:
Power Source Equipment (PSE) coupled to a Powered Device (PD) via a wire pair, wherein differential data signals and DC power are transmitted over the same wire pair;
a PSE controller and a PD controller configured to carry out a low power handshaking phase over the wire pair, the handshaking phase providing a first signature signal from the PD to the PSE to identify whether the PD is compatible for receiving an operating voltage over the wire pair or to identify a particular voltage requirement of the PD or to identify a maximum power level of the PD;
a voltage limiting circuit across the wire pair that limits a voltage across the wire pair to a predetermined magnitude, wherein the voltage of the predetermined magnitude provides the first signature signal;
a current source in the PSE coupled to the wire pair for conducting a current through the voltage limiting circuit to cause the voltage limiting circuit to generate the first signature signal of the PD; and
a first detector in the PSE coupled to the wire pair and configured to detect the first signature signal on the wire pair;
wherein the predetermined magnitude of the voltage limited by the voltage limiting circuit is above the operating voltage of the PD.

### Claim 13 (depends on 12)

The system of claim 12 wherein the voltage limiting circuit also functions as an electrostatic discharge protection circuit.