# US 10,122,383 B2 · Channel decoding method and apparatus using structured priori information of preamble > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,122,383 B2 - Document ID: US10122383B2 - Status: Granted - Kind: B2 - Application number: 15/617,242 - Filed: 2017-06-08 - Published: 2017-12-14 - Granted: 2018-11-06 - Earliest claimed: 2016-06-08 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Jung-hyun Park; Sung-kyu Jung; Chang-hoon Choi - Web page: https://patentgrep.com/patent/US10122383B2 ## CPC - H03M 13/1125: {using different domains for check node and bit node processing, wherein the different domains include probabilities, likelihood ratios, likelihood differences, log-likelihood ratios or log-likelihood difference pairs} - H03M 13/1111: {Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms} - H03M 13/255: {with Low Density Parity Check [LDPC] codes} - H03M 13/3723: {using means or methods for the initialisation of the decoder} - H03M 13/6325: {Error control coding in combination with demodulation} - H04L 1/00: Arrangements for detecting or preventing errors in the information received {(correcting synchronisation H04L7/00)} - H04L 1/0045: {Arrangements at the receiver end} - H04L 1/0057: {Block codes (H04L1/0061, H04L1/0064 take precedence)} - H04L 2001/0093: {Point-to-multipoint} - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract A channel decoding method is provided. The method includes storing, in a memory, a set of first log likelihood ratio (LLR) values corresponding to bits of a codeword generated by modulation of a channel-encoded signal; changing, into a preset value, at least one LLR value corresponding to previously defined bits of the codeword from among the set of the first LLR values, to generate a set of second LLR values; and performing forward error correction (FEC) based on the set of the second LLR values and an FEC code, to estimate the bits of the codeword, in which the FEC code comprises a constraint code for constricting a previously defined structural correlation between the bits of the codeword. ## Claims ### Claim 1 A channel decoding method comprising: storing, in a memory, a set of first log likelihood ratio (LLR) values corresponding to bits of a codeword generated by modulation of a channel-encoded signal; changing, into a preset value, at least one LLR value corresponding to previously defined bits of the codeword from among the set of the first LLR values, to generate a set of second LLR values; and performing forward error correction (FEC), based on the set of the second LLR values and an FEC code, to estimate the bits of the codeword, wherein the FEC code comprises a constraint code for constricting a previously defined structural correlation between the bits of the codeword. ### Claim 2 (depends on 1) The channel decoding method of claim 1, wherein the FEC code comprises a low-density parity-check (LDPC) code. ### Claim 3 (depends on 2) The channel decoding method of claim 2, wherein to estimate the bits of the codeword comprises: determining, based on the set of the second LLR values, an update value for check nodes connected with variable nodes of the LDPC code through edges; determining an update value for the variable nodes based on the update value for the check nodes; and determining whether a decoding stop condition is satisfied through a parity check, based on the update value for the check nodes and the update value for the variable nodes. ### Claim 4 (depends on 3) The channel decoding method of claim 3, wherein the constraint code comprises a code in which at least one check node is incremented for the check nodes, and the at least one incremented check node constricts a relationship between two or more variable nodes among the variable nodes. ### Claim 5 (depends on 1) The channel decoding method of claim 1, wherein previously defined bits of the codeword correspond to at least one of a reserved bit and a fixed bit of a channel-encoded preamble. ### Claim 6 (depends on 1) The channel decoding method of claim 1, wherein the structural correlation comprises a constraint relationship in which a specific value is not allowed for two or more bits among bits of a channel-encoded preamble. ### Claim 7 (depends on 1) The channel decoding method of claim 1, further comprising determining whether the channel-encoded signal is an Advanced Television Systems Committee (ATSC) 3.0 frame or an ATSC 3.X frame. ### Claim 8 (depends on 7) The channel decoding method of claim 7, wherein a position of the previously defined bits of the codeword and the changed at least one LLR value are based on whether an encoded current frame is a time-aligned frame or a symbol-aligned frame. ### Claim 9 A channel decoding apparatus comprising: a memory configured to store a set of first log likelihood ratio (LLR) values corresponding to bits of a codeword generated by modulation of a channel-encoded signal; a controller configured to change, into a preset value, at least one LLR value corresponding to previously defined bits of the codeword from among the set of the first LLR values, to generate a set of second LLR values; and a decoder configured to perform forward error correction (FEC) based on the set of the second LLR values and an FEC code, to estimate the bits of the codeword, wherein the FEC code comprises a constraint code for constricting a previously defined structural correlation between the bits of the codeword. ### Claim 10 (depends on 9) The channel decoding apparatus of claim 9, wherein the FEC code comprises a low-density parity-check (LDPC) code. ### Claim 11 (depends on 10) The channel decoding apparatus of claim 10, wherein the decoder is further configured to determine an update value for check nodes connected with variable nodes of the LDPC code through edges, based on the set of the second LLR values; to determine an update value for the variable nodes, based on the update value for the check nodes; and to determine whether a decoding stop condition is satisfied through a parity check, based on the update value for the check nodes and the update value for the variable nodes. ### Claim 12 (depends on 11) The channel decoding apparatus of claim 11, wherein the constraint code comprises a code in which at least one check node is incremented for the check nodes, and the at least one incremented check node constricts a relationship between two or more variable nodes among the variable nodes. ### Claim 13 (depends on 9) The channel decoding apparatus of claim 9, wherein previously defined bits of the codeword correspond to at least one of a reserved bit and a fixed bit of a channel-encoded preamble. ### Claim 14 (depends on 9) The channel decoding apparatus of claim 9, wherein the structural correlation comprises a constraint relationship in which a specific value is not allowed for two or more bits among bits of a channel-encoded preamble. ### Claim 15 (depends on 1) A non-transitory computer-readable recording medium having recorded thereon a program which, when executed by a computer, performs the method of claim 1.