# US 10,122,364 B2 · Programmable logic device and semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,122,364 B2 - Document ID: US10122364B2 - Status: Granted - Kind: B2 - Application number: 15/146,981 - Filed: 2016-05-05 - Published: 2016-11-03 - Granted: 2018-11-06 - Earliest claimed: 2012-05-25 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Takayuki Ikeda; Yoshiyuki Kurokawa - Web page: https://patentgrep.com/patent/US10122364B2 ## CPC - H03K 19/1776: for memories - H03K 19/1735: {by wiring, e.g. uncommitted logic arrays} - H03K 19/177: arranged in matrix form - H03K 19/17728: Reconfigurable logic blocks, e.g. lookup tables - H03K 19/17764: for reliability - H03K 19/17792: for operating speed - H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs} - H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate} - H10D 62/80: characterised by the materials - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/60: wherein the TFTs are in active matrices - H10D 87/00: Integrated devices comprising both bulk components and either SOI or SOS components on the same substrate - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract Provided is a programmable logic device that includes logic elements arranged in a plurality of columns. Wirings connecting logic elements are arranged between the plurality of columns. Switch circuits that control electrical connections between the wirings and the logic elements are also arranged between the plurality of columns. Each of the switch circuit selects an electrical connection between one of the wirings and an input terminal of one of the logic elements in accordance with configuration data. ## Claims ### Claim 1 A programmable logic device comprising: a plurality of first logic elements arranged in a first column; a plurality of second logic elements arranged in a second column; a plurality of third logic elements arranged in a third column parallel to the first column and the second column, wherein the second column is positioned between the first column and the third column; a plurality of first wirings arranged between the first column and the second column, wherein the plurality of first wirings are electrically connected to corresponding first output terminals of the plurality of second logic elements; a plurality of second wirings arranged between the second column and the third column, wherein the plurality of second wirings are electrically connected to corresponding second output terminals of the plurality of second logic elements; a plurality of third wirings arranged both between the first column and the second column and between the second column and the third column via one of an upper end and a lower end of the second column, wherein the plurality of third wirings are electrically connected to corresponding first output terminals of the plurality of third logic elements; and a plurality of switch circuits arranged between the first column and the second column, the plurality of switch circuits electrically connected to corresponding input terminals of the plurality of second logic elements and electrically connected to each of the plurality of first wirings, the plurality of second wirings, and the plurality of third wirings. ### Claim 2 (depends on 1) The programmable logic device according to claim 1, wherein output terminals of the plurality of third logic elements are directly connected to the plurality of switch circuits between the first column and the second column through the plurality of third wirings. ### Claim 3 (depends on 1) The programmable logic device according to claim 1, wherein each of the plurality of switch circuits comprises a first switch and a second switch configured to be controlled by a configuration data input through the first switch. ### Claim 4 (depends on 3) The programmable logic device according to claim 3, wherein the first switch is a transistor comprising a metal oxide in a channel formation region. ### Claim 5 (depends on 4) The programmable logic device according to claim 4, wherein the metal oxide comprises at least one of indium, gallium, and zinc. ### Claim 6 (depends on 1) The programmable logic device according to claim 1, comprising: a plurality of IO elements arranged in a fourth column, wherein the first column is positioned between the second column and the fourth column; a plurality of fourth wirings arranged between the first column and the fourth column; a plurality of fifth wirings arranged between the first column and the fourth column; and a plurality of switches arranged between the first column and the fourth column, wherein the plurality of fourth wirings are electrically connected to corresponding output terminal of the plurality of first logic elements, wherein one of the plurality of switches is configured to electrically connect one of the plurality of fourth wirings to an input terminal of one of the plurality of IO elements, and wherein the plurality of fifth wirings are electrically connected to corresponding output terminals of the plurality of IO elements. ### Claim 7 (depends on 1) The programmable logic device according to claim 1, wherein each of the plurality of first logic elements, the plurality of second logic elements, and the plurality of third logic elements comprises a lookup table and a configuration memory operatively connected to the lookup table. ### Claim 8 A programmable logic device comprising: a plurality of first logic elements arranged in a first column; a plurality of second logic elements arranged in a second column; a plurality of third logic elements arranged in a third column parallel to the first column and the second column, wherein the second column is positioned between the first column and the third column; a plurality of fourth logic elements arranged in a fourth column parallel to the first column, the second column, and the third column, wherein the third column is positioned between the second column and the fourth column a plurality of first wirings arranged between the first column and the second column, wherein the plurality of first wirings are electrically connected to corresponding first output terminals of the plurality of second logic elements; a plurality of second wirings arranged between the second column and the third column, wherein the plurality of second wirings are electrically connected to corresponding second output terminals of the plurality of second logic elements; a plurality of third wirings arranged both between the first column and the second column and between the second column and the third column via one of an upper end and a lower end of the second column, wherein the plurality of third wirings are electrically connected to corresponding first output terminals of the plurality of third logic elements; a plurality of fourth wirings arranged both between the second column and the third column and between the third column and the fourth column via one of an upper end and a lower end of the third column, wherein the plurality of fourth wirings are electrically connected to corresponding first output terminals of the plurality of fourth logic elements; and a plurality of switch circuits arranged between the first column and the second column, the plurality of switch circuits electrically connected to corresponding input terminals of the plurality of second logic elements and electrically connected to each of the plurality of first wirings, the plurality of second wirings, and the plurality of third wirings. ### Claim 9 (depends on 8) The programmable logic device according to claim 8, wherein output terminals of the plurality of third logic elements are directly connected to the plurality of switch circuits between the first column and the second column through the plurality of third wirings. ### Claim 10 (depends on 8) The programmable logic device according to claim 8, wherein each of the plurality of switch circuits comprises a first switch and a second switch configured to be controlled by a configuration data input through the first switch. ### Claim 11 (depends on 10) The programmable logic device according to claim 10, wherein the first switch is a transistor comprising a metal oxide in a channel formation region. ### Claim 12 (depends on 11) The programmable logic device according to claim 11, wherein the metal oxide comprises at least one of indium, gallium, and zinc. ### Claim 13 (depends on 8) The programmable logic device according to claim 8, comprising: a plurality of IO elements arranged in a fifth column, wherein the first column is positioned between the second column and the fifth column; a plurality of fourth wirings arranged between the first column and the fifth column; a plurality of fifth wirings arranged between the first column and the fifth column; and a plurality of switches arranged between the first column and the fifth column, wherein the plurality of fourth wirings are electrically connected to corresponding output terminal of the plurality of first logic elements, wherein one of the plurality of switches is configured to electrically connect one of the plurality of fourth wirings to an input terminal of one of the plurality of IO elements, and wherein the plurality of fifth wirings are electrically connected to corresponding output terminals of the plurality of IO elements. ### Claim 14 (depends on 8) The programmable logic device according to claim 8, wherein each of the plurality of first logic elements, the plurality of second logic elements, and the plurality of third logic elements comprises a lookup table and a configuration memory operatively connected to the lookup table. ### Claim 15 (depends on 8) The programmable logic device according to claim 8, wherein the plurality of third wirings are arranged both between the first column and the second column and between the second column and the third column via the upper end of the second column, and wherein the plurality of fourth wirings are arranged both between the second column and the third column and between the third column and the fourth column via the lower end of the third column.