# US 10,122,358 B1 · Packaged semiconductor device

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- Number: US 10,122,358 B1
- Document ID: US10122358B1
- Status: Granted
- Kind: B1
- Application number: 15/796,878
- Filed: 2017-10-30
- Published: 2018-10-25
- Granted: 2018-11-06
- Earliest claimed: 2017-04-24
- Assignees: Mitsubishi Electric Corporation
- Applicants: Mitsubishi Electric Corporation
- Inventors: Takuya Shiraishi
- Web page: https://patentgrep.com/patent/US10122358B1

## CPC

- H03K 17/567: Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
- H02H 7/205: {for controlled semi-conductors which are not included in a specific circuit arrangement}
- H10W 70/465: {Bumps or wires}
- H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00}
- H10W 74/129: {forming a chip-scale package [CSP]}
- H10W 90/811: {Multiple chips on leadframes}
- H10W 70/411: {Chip-supporting parts, e.g. die pads}
- H10W 72/5473: {multiple bond wires connected to a common bond pad}
- H10W 72/5475: {multiple bond wires connected to common bond pads at both ends of the wires}
- H10W 72/5524: {comprising aluminium [Al]}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/926: {Multiple bond pads having different sizes}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- H02H: EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS (indicating or signalling undesired working conditions G01R, e.g. G01R31/00, G08B; locating faults along lines G01R31/08; emergency protective devices H01H)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device includes: a transistor including a main terminal and a sense terminal; a main output electrode connected to the main terminal via a first wire; a sense output electrode connected to the sense terminal via a second wire; and a package sealing the transistor, the first and second wires, part of the main output electrode and part of the sense output electrode, wherein a wiring inductance from the main terminal to the main output electrode is larger than a wiring inductance from the sense terminal to the sense output electrode.

## Claims

### Claim 1

A semiconductor device comprising:
a transistor including a main terminal and a sense terminal;
a main output electrode connected to the main terminal via a first wire;
a sense output electrode connected to the sense terminal via a second wire; and
a package sealing the transistor, the first and second wires, part of the main output electrode and part of the sense output electrode,
wherein a wiring inductance from the main terminal to the main output electrode is larger than a wiring inductance from the sense terminal to the sense output electrode.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, further comprising:
a control IC controlling the transistor and provided in the package; and
a resistor provided outside the package and connected to the sense output electrode,
wherein the control IC shuts off the transistor upon detecting a short circuit current from a voltage applied to the resistor.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein a length of the first wire is larger than a length of the second wire.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, wherein the number of wires of the second wire is greater than the number of wires of the first wire.

### Claim 5 (depends on 3)

The semiconductor device according to claim 3, further comprising a relay electrode provided in the package,
wherein the first wire includes a third wire connecting the main terminal to the relay electrode, and a fourth wire connecting the relay electrode to the main output electrode.

### Claim 6 (depends on 5)

The semiconductor device according to claim 5, wherein the transistor, the main output electrode, the relay electrode, and the second, third and fourth wires are respectively divided into a plurality of phases, and
in each phase, if the third wire becomes longer, the number of wires of the fourth wire is increased.

### Claim 7 (depends on 6)

The semiconductor device according to claim 6, wherein the sense output electrode is divided into a plurality of frames, which are mutually connected via fifth wires, and
the sense terminals of the transistor of the respective phases are connected to the divided frames respectively.

### Claim 8 (depends on 1)

The semiconductor device according to claim 1, wherein the transistor is a SiCMOS transistor.