# US 10,122,335 B2 · Low voltage high speed CMOS line driver without tail current source > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,122,335 B2 - Document ID: US10122335B2 - Status: Granted - Kind: B2 - Application number: 15/811,036 - Filed: 2017-11-13 - Published: 2018-03-08 - Granted: 2018-11-06 - Earliest claimed: 2016-07-01 - Assignees: Inphi Corporation - Applicants: Inphi Corporation - Inventors: Rajasekhar Nagulapalli; Simon Forey; Parmanand Mishra - Web page: https://patentgrep.com/patent/US10122335B2 ## CPC - H03F 3/45183: {Long tailed pairs (H03F3/4521, H03F3/45237 take precedence)} - H03F 3/45188: {Non-folded cascode stages} - H03F 3/4565: {Controlling the common source circuit of the differential amplifier} - H03F 1/34: Negative-feedback-circuit arrangements with or without positive feedback (H03F1/02 - H03F1/30, H03F1/38 - H03F1/50, H03F3/50 take precedence {; for rejection of common mode signals H03F3/45479}) - H03F 3/45: Differential amplifiers (differential sense amplifiers G11C7/062) - H03F 3/45479: {characterised by the way of common mode signal rejection} - H03F 3/45659: {Controlling the loading circuit of the differential amplifier} - H03F 2203/45082: the common mode signal being taken or deducted from the one or more outputs of the differential amplifier - H03F 2203/45418: the CMCL comprising a resistor addition circuit - H03F 2203/45424: the CMCL comprising a comparator circuit - H03F 2203/45481: the CSC comprising only a direct connection to the supply voltage, no other components being present - H03F 2203/45508: the CSC comprising a voltage generating circuit as bias circuit for the CSC - H03F 2203/45652: the LC comprising one or more further dif amp stages, either identical to the dif amp or not, in cascade - H03F 2203/45702: the LC comprising two resistors - H03F: AMPLIFIERS ## Abstract The present invention is directed to electrical circuits and techniques thereof. More specifically, an embodiment of the present invention provides a line driver with transistors directly coupled to the ground, and a bias voltage is coupled common mode resistors of the line driver. There are other embodiments as well. ## Claims ### Claim 1 A data communication system comprising: a voltage supply, the voltage supply being characterized by a first voltage level; a common voltage source comprising a voltage divider, the voltage divider comprises a pair of resistors characterized by predetermined resistance values, the common voltage source being coupled to a bias voltage; a first load resistor and a second load resistor, the first load resistor and the second load resistor being characterized by a first resistance value; a first common resistor and a second common resistor, the first common resistor being characterized by a second resistance value, the second resistance value being higher than the first resistance value, the first common resistor being configured in series with the second common resistor, the common voltage source being coupled between the first common resistor and the second common resistor; a first voltage input and a second voltage input; a first switch comprising a first gate and a first drain and a first source, the first gate being coupled to the first voltage input, the first drain being coupled to the first load resistor and the first common resistor, the first source being coupled to a ground terminal; and a second switch comprising a second gate and a second drain and a second source, the second gate being coupled to the second voltage input, the second drain being coupled to the second load resistor and the second common resistor, the second source being coupled to the ground terminal. ### Claim 2 (depends on 1) The system of claim 1 further comprising a first load resistor and a second load resistor, the first load resistor and the second load resistor being characterized by a first resistance value. ### Claim 3 (depends on 2) The system of claim 2 wherein the operational amplifier is coupled to a bias voltage. ### Claim 4 (depends on 3) The system of claim 3 wherein the bias voltage comprises a bias resistor and a bias current source. ### Claim 5 (depends on 1) The system of claim 1 wherein the first switch comprises an NMOS transistor. ### Claim 6 (depends on 1) The system of claim 1 wherein the first voltage input is coupled to a pre-driver module. ### Claim 7 (depends on 6) The system of claim 6 wherein the pre-deriver module is coupled to the operational amplifier. ### Claim 8 (depends on 6) The system of claim 6 wherein the pre-deriver module comprises PMOS transistors. ### Claim 9 (depends on 1) The system of claim 1 wherein the second resistor value is at least 100 times greater than the first resistor value. ### Claim 10 A line driver apparatus comprising: a bias voltage; an amplifier comprising a first input terminal and a second input terminal and an output terminal, the first input terminal being coupled to the bias voltage; a pre-driver module, the pre-driver module being coupled to the output terminal, the pre-driver module being configured to provide a first voltage input and a second voltage input, the pre-driver comprises a pair of PMOS transistors coupled to a pair of input signals; a common voltage source; a first load resistor and a second load resistor, the first load resistor and the second load resistor being characterized by a first resistance value; a first common resistor and a second common resistor, the first common resistor and the second common resistor being characterized by a second resistance value, the second resistance value being higher than the first resistance value, the first common resistor being configured in series with the second common resistor, the common voltage source being coupled between the first common resistor and common resistor the second input terminal of the amplifier; a first switch comprising a first gate and a first drain and a first source, the first gate being coupled to the first voltage input, the first drain being coupled to the first load resistor and the first common resistor, the first source being coupled to a ground terminal; and a second switch comprising a second gate and a second drain and a second source, the second gate being coupled to the second voltage input, the second drain being coupled to the second load resistor and the second common resistor, the second source being coupled to the ground terminal. ### Claim 11 (depends on 10) The apparatus of claim 10 wherein the pre-driver module comprises a third switch coupled to the output terminal of the amplifier. ### Claim 12 (depends on 11) The apparatus of claim 11 wherein the third switch is coupled to the voltage supply. ### Claim 13 (depends on 10) The apparatus of claim 10 further comprising a voltage supply, the voltage supply being characterized by a first voltage level, the line driver being characterized by a swing voltage, the swing voltage being substantially equal to the first voltage level. ### Claim 14 (depends on 10) The apparatus of claim 10 wherein the pair of PMOS transistors are respectively coupled to a pair of pre-driver resistors. ### Claim 15 (depends on 10) The apparatus of claim 10 wherein the bias voltage comprises a bias resistor and a bias current source configured in series. ### Claim 16 (depends on 15) The apparatus of claim 15 wherein the bias resistor is configured between the voltage supply and the bias current source. ### Claim 17 A line driver apparatus, comprising: a common voltage source comprising a first resistor and a second resistor configured in series, the first resistor and the second resistor being characterized by a predetermined resistance ratio, a common voltage terminal being coupled between the first resistor and the second resistor; a first load resistor and a second load resistor, the first load resistor and the second load resistor being characterized by a first resistance value; a first common resistor and a second common resistor, the first common resistor being characterized by a second resistance value, the second resistance value being higher than the first resistance value, the first common resistor being configured in series with the second common resistor, the common voltage terminal being coupled between the first common resistor and the second common resistor; a first switch comprising a first gate and a first drain and a first source, the first gate being coupled to a first voltage input, the first voltage input being associated with the common voltage, the first drain being coupled to the first load resistor and the first common resistor, the first source being directly coupled to a ground terminal; and a second switch comprising a second gate and a second drain and a second source, the second gate being coupled to a second voltage input, the second voltage input being associated with the common voltage, the second drain being coupled to the second load resistor and the second common resistor, the second source being directly coupled to the ground terminal. ### Claim 18 (depends on 17) The apparatus of claim 17 wherein the first resistor is coupled to the voltage supply and the second resistor is coupled to the ground terminal. ### Claim 19 (depends on 17) The apparatus of claim 17 the common voltage terminal is coupled to an operational amplifier. ### Claim 20 (depends on 17) The apparatus of claim 17 further comprising a voltage supply, the voltage supply being characterized by a first voltage level, wherein the differential amplifier is characterized by a swing voltage, the swing voltage being substantially equal to the first voltage level.