# US 10,122,269 B2 · Current mode control of a buck converter using coupled inductance

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- Number: US 10,122,269 B2
- Document ID: US10122269B2
- Status: Granted
- Kind: B2
- Application number: 15/402,827
- Filed: 2017-01-10
- Published: 2018-03-22
- Granted: 2018-11-06
- Earliest claimed: 2016-09-22
- Assignees: Apple Inc.
- Applicants: Apple Inc.
- Inventors: Fabio Gozzini; Jay B. Fletcher; Shawn Searles; Sanjay Pant
- Web page: https://patentgrep.com/patent/US10122269B2

## CPC

- H02M 3/156: with automatic control of output voltage or current, e.g. switching regulators
- H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M 3/1584: {with a plurality of power processing stages connected in parallel}
- H02M 1/0003: {Details of control, feedback or regulation circuits}
- H02M 1/0009: {Devices or circuits for detecting current in a converter}
- H02M 1/0025: {Arrangements for modifying reference values, feedback values or error values in the control loop of a converter}
- H02M 1/0064: {Magnetic structures combining different functions, e.g. storage, filtering or transformation}
- H02M 3/1586: {switched with a phase shift, i.e. interleaved}
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)

## Abstract

A system that includes a regulator circuit is disclosed. The regulator circuit includes first and second phase units whose outputs are coupled to a power supply node of a circuit block, via respective coupled inductors. The first phase unit may initiate a charge cycle of the power supply node in response to assertion of a clock signal and generate a compensated current using currents measure through both inductors and the clock signal. In response to a determination that the compensated current is greater than a demand current generated using a voltage level of the power supply node and a reference voltage, the first phase unit may halt the charge cycle.

## Claims

### Claim 1

An apparatus, comprising:
a first inductor coupled to a power supply node included in a load circuit;
a second inductor coupled to the power supply node and inductively coupled to the first inductor;
a transconductance circuit configured to generate a demand current using a voltage level of the power supply node and a reference voltage; and
a first phase unit configured to:
initiate a first charge cycle of the power supply node through the first inductor in response to an assertion of a first clock signal;
generate a first compensated current using a first current measured through the first inductor, a second current measured through the second inductor, the first clock signal, and a coupling coefficient betweeen the first inductor and the second inductor; and
halt the first charge cycle in response to a determination that first compensated current is greater than the demand current.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the first phase unit includes a slope compensation circuit configured to generate a proportional current whose value is based on a voltage level at an output of the first phase unit and the coupling coefficient between the first inductor and the second inductor.

### Claim 3 (depends on 2)

The apparatus of claim 2, wherein the slope compensation circuit is further configured to charge a capacitor using a difference between the proportional current and a sum of the first current and the second current.

### Claim 4 (depends on 3)

The apparatus of claim 3, further comprising a second phase unit configured to initiate a second charge cycle of the power supply node through the second inductor in response to an assertion of a second clock signal.

### Claim 5 (depends on 4)

The apparatus of claim 4, wherein the slope compensation circuit is further configured to:
discharge the capacitor using the first clock signal and the sum of the first current and the second current; and
charge the capacitor using the second clock signal and the proportional current.

### Claim 6 (depends on 1)

The apparatus of claim 1, wherein to initiate the first charge cycle, the first phase unit is further configured to source a charging current to the power supply node via the first inductor.

### Claim 7

A method, comprising:
generating a demand current using a voltage level of a power supply node included in a load circuit and a reference voltage, wherein the power supply node is coupled to a first inductor and a second inductor, and wherein the second inductor is inductively coupled to the first inductor;
initiating a first charge cycle of the power supply node through the first inductor in response to an assertion of a first clock signal;
generating a first compensated current using a first current measured through the first inductor, a second current measured through the second inductor, the first clock signal, and a coupling coefficient between the first inductor and the second inductor; and
halting the first charge cycle in response to determining that the first compensated current is greater than the demand current.

### Claim 8 (depends on 7)

The method of claim 7, wherein generating the first compensated current includes generating a proportional current whose value is based on a voltage level at a terminal of the first inductor and the coupling coefficient between the first inductor and the second inductor.

### Claim 9 (depends on 8)

The method of claim 8, wherein generating the first compensated current further includes charging a capacitor using a difference between the proportional current and a sum of the first current and the second current.

### Claim 10 (depends on 9)

The method of claim 9, further comprising initiating a second charge cycle of the power supply node through the second inductor in response to an assertion of a second clock signal.

### Claim 11 (depends on 10)

The method of claim 10, wherein generating the first compensated current includes:
discharging the capacitor using the first clock signal and the sum of the first current and the second current and
charging the capacitor using the second clock signal and the proportional current.

### Claim 12 (depends on 7)

The method of claim 7, wherein initiating the first charge cycle includes sourcing a charging current to the power supply node via the first inductor.

### Claim 13 (depends on 7)

The method of claim 7, wherein halting the first charge cycle includes sinking a discharge current from the power supply node via the first inductor.

### Claim 14

A system, comprising:
a plurality of circuit blocks;
a first inductor coupled to a power supply node of a particular circuit block of the plurality of circuit blocks;
a second inductor coupled to the power supply node of the particular circuit block, wherein the second inductor is inductively coupled to the first inductor;
a regulator circuit configured to:
generate a demand current using a voltage level of the power supply node and a reference voltage;
initiate a first charge cycle of the power supply node through the first inductor in response to an assertion of a first clock signal;
generating a first compensated current using a first current measured through the first inductor, a second current measured through the second inductor, the first clock signal, and a coupling coefficient between the first inductor and the second inductor; and
halting the first charge cycle in response to determining that the first compensated current is greater than the demand current.

### Claim 15 (depends on 14)

The system of claim 14, wherein to generate the first compensated current, the regulator circuit is further configured generate a proportional current whose value is based on a voltage level at an output of the regulator circuit and the coupling coefficient between the first inductor and the second inductor.

### Claim 16 (depends on 15)

The system of claim 15, wherein to generate the first compensated current, the regulator circuit is further configured to charge a capacitor using a difference between the proportional current and a sum of the first current and the second current.

### Claim 17 (depends on 16)

The system of claim 16, wherein the regulator circuit is further configured to initiate a second charge cycle of the power supply node through the second inductor in response to an assertion of a second clock signal.

### Claim 18 (depends on 17)

The system of claim 17, wherein the regulator circuit is further configured to:
discharge the capacitor using the first clock signal and the sum of the first current and the second current; and
charge the capacitor using the second clock signal and the proportional current.

### Claim 19 (depends on 14)

The system of claim 14, wherein to initiate the first charge cycle, the regulator circuit is further configured to source a charging current to the power supply node via the first inductor.

### Claim 20 (depends on 14)

The system of claim 14, wherein to halt the first charge cycle, the regulator circuit is further configured to sink a discharge current from the power supply node via the first inductor.
