# US 10,121,908 B2 · High withstand voltage diode and power conversion device

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- Number: US 10,121,908 B2
- Document ID: US10121908B2
- Status: Granted
- Kind: B2
- Application number: 15/840,753
- Filed: 2017-12-13
- Published: 2018-09-13
- Granted: 2018-11-06
- Earliest claimed: 2017-03-13
- Assignees: Mitsubishi Electric Corporation
- Applicants: Mitsubishi Electric Corporation
- Inventors: Koji Tanaka
- Web page: https://patentgrep.com/patent/US10121908B2

## CPC

- H10D 8/411: {PN diodes having planar bodies}
- H02P 27/06: using DC to AC converters or inverters (H02P27/05 takes precedence)
- H10D 8/00: Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00)
- H10D 62/10: Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D 62/124: {Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions}
- H10D 62/128: {Anode regions of diodes}
- H10D 62/129: {Cathode regions of diodes}
- H10D 62/13: Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D 12/441: {Vertical IGBTs}
- H10D 62/8325: {Silicon carbide}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 84/403: {Combinations of FETs or IGBTs with BJTs and with one or more of diodes, resistors or capacitors}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H02P: CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS

## Abstract

It is an object of the present invention to provide a semiconductor device capable of adjusting a VF-EREC trade-off characteristic without a life-time control and a power conversion device having the semiconductor device. A semiconductor device according to the present invention includes a p−-type anode layer including a donor impurity and an acceptor impurity. An acceptor impurity concentration of the p-type anode layer is equal to or larger than a donor impurity concentration of the p−-type anode layer, an acceptor impurity concentration of the p−-type anode layer is equal to or larger than a donor impurity concentration of the p−-type anode layer, and a donor impurity concentration of the p−-type anode layer is equal to or larger than a donor impurity concentration of the n-type drift layer.

## Claims

### Claim 1

A semiconductor device, comprising:
an n-type drift layer;
a first p-type anode layer provided on a surface of said n-type drift layer;
at least one second p-type anode layer being selectively provided on a surface of said first p-type anode layer, including a donor impurity and an acceptor impurity, and having an acceptor impurity concentration lower than said first p-type anode layer;
an n-type buffer layer provided on a rear surface of said n-type drift layer; and
an n-type cathode layer and a p-type cathode layer provided to be adjacent to each other in a planar view on a surface of said n-type buffer layer, wherein
a thickness of said n-type cathode layer is equal to or larger than a thickness of said p-type cathode layer,
a thickness of said first p-type anode layer is equal to or larger than a thickness of said second p-type anode layer,
a donor impurity concentration of said n-type cathode layer is equal to or larger than an acceptor impurity concentration of said p-type cathode layer,
an acceptor impurity concentration of said first p-type anode layer is equal to or larger than a donor impurity concentration of said second p-type anode layer,
an acceptor impurity concentration of said second p-type anode layer is equal to or larger than a donor impurity concentration of said second p-type anode layer, and
a donor impurity concentration of said second p-type anode layer is equal to or larger than a donor impurity concentration of said n-type drift layer.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein
said second p-type anode layer is provided in a position facing said n-type cathode layer, and
a width of said second p-type anode layer is smaller than a width of said n-type cathode layer.

### Claim 3 (depends on 2)

The semiconductor device according to claim 2, wherein
a plurality of said second p-type anode layers are provided.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, wherein
said each second p-type anode layer is provided in a position facing each of said n-type cathode layer and said p-type cathode layer, and
a width of said second p-type anode layer provided in a position facing said n-type cathode layer is smaller than a width of said second p-type anode layer provided in a position facing said p-type cathode layer.

### Claim 5 (depends on 4)

The semiconductor device according to claim 4, wherein
a plurality of said second p-type anode layers are provided in a position facing said n-type cathode layer.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, wherein
said each second p-type anode layer is provided in a position facing each of said n-type cathode layer and said p-type cathode layer,
a width of said second p-type anode layer provided in a position facing said n-type cathode layer is smaller than a width of said n-type cathode layer, and
a width of said second p-type anode layer provided in a position facing said p-type cathode layer is smaller than a width of said p-type cathode layer.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1, wherein
said second p-type anode layer, said n-type cathode layer, and said p-type cathode layer are provided repeatedly.

### Claim 8 (depends on 1)

A power conversion device, comprising:
a main conversion circuit having said semiconductor device according to claim 1, and converting and outputting an electrical power being input to said main conversion circuit; and
a control circuit outputting control signals for controlling said main conversion circuit to said main conversion circuit.