# US 10,121,905 B2 · Semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,121,905 B2 - Document ID: US10121905B2 - Status: Granted - Kind: B2 - Application number: 14/474,800 - Filed: 2014-09-02 - Published: 2015-03-05 - Granted: 2018-11-06 - Earliest claimed: 2013-09-20 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Hiroyuki Miyake - Web page: https://patentgrep.com/patent/US10121905B2 ## CPC - H10D 30/68: Floating-gate IGFETs - H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs} - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes - G09G 2300/0866: by means of changes in the pixel supply voltage - H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate} - H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors} - H10D 86/60: wherein the TFTs are in active matrices - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract Provided is a semiconductor device including a transistor in which a first gate and a second gate are provided with a channel formation region provided therebetween and which achieves both control of the threshold voltage and an increase in the on-state current. In a period during which first voltage with which the transistor is turned off is supplied to the first gate, control voltage for controlling the threshold voltage is supplied to the second gate. In a period during which second voltage with which the transistor is turned on is supplied to the first gate, the second voltage is supplied to the first gate and voltage in which voltage based on change in the voltage of a signal supplied to the first gate is added to the control voltage is supplied to the second gate. ## Claims ### Claim 1 A semiconductor device comprising: a first transistor comprising a first gate and a second gate; and a source follower circuit electrically connected to the first transistor, the source follower circuit comprising a second transistor and a third transistor, wherein the second transistor and the third transistor are connected in series, wherein the first gate is electrically connected to the second gate through the source follower circuit, wherein a channel formation region of the first transistor is provided between the first gate and the second gate, wherein in a first period during which a first voltage with which the first transistor is turned off is supplied to the first gate, a control voltage is supplied to the second gate, wherein in a second period during which a second voltage with which the first transistor is turned on is supplied to the first gate, a third voltage is supplied to the second gate, and wherein the second voltage is different from the third voltage. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein an input terminal of the source follower circuit is electrically connected to the first gate, and wherein an output terminal of the source follower circuit is electrically connected to the second gate. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the first transistor comprises an oxide semiconductor in the channel formation region. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein the third voltage is higher than the control voltage. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein the third voltage changes in accordance with a change of a voltage of the first gate. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein the second gate is electrically floating in the second period. ### Claim 7 A semiconductor device comprising: a first transistor comprising a first gate and a second gate; and a source follower circuit electrically connected to the first transistor, the source follower circuit comprising a second transistor and a third transistor, wherein the second transistor and the third transistor are connected in series, wherein the first gate is electrically connected to the second gate through the source follower circuit, wherein the second gate is electrically connected to one of a source and a drain of the second transistor and one of a source and a drain of the third transistor, wherein a channel formation region of the first transistor is provided between the first gate and the second gate, wherein in a first period during which a first voltage with which the first transistor is turned off is supplied to the first gate, a control voltage is supplied to the second gate, wherein in a second period during which a second voltage with which the first transistor is turned on is supplied to the first gate, a third voltage is supplied to the second gate, and wherein the second voltage is different from the third voltage. ### Claim 8 (depends on 7) The semiconductor device according to claim 7, wherein an input terminal of the source follower circuit is electrically connected to the first gate, and wherein an output terminal of the source follower circuit is electrically connected to the second gate. ### Claim 9 (depends on 7) The semiconductor device according to claim 7, wherein the first transistor comprises an oxide semiconductor in the channel formation region. ### Claim 10 (depends on 7) The semiconductor device according to claim 7, wherein the third voltage is higher than the control voltage. ### Claim 11 (depends on 7) The semiconductor device according to claim 7, wherein the third voltage changes in accordance with a change of a voltage of the first gate. ### Claim 12 (depends on 7) The semiconductor device according to claim 7, wherein the second gate is electrically floating in the second period.