# US 10,121,899 B2 · Thin film transistor substrate and display using the same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,121,899 B2
- Document ID: US10121899B2
- Status: Granted
- Kind: B2
- Application number: 15/352,951
- Filed: 2016-11-16
- Published: 2017-06-01
- Granted: 2018-11-06
- Earliest claimed: 2015-11-26
- Assignees: LG Display Co., Ltd.
- Applicants: LG Display Co., Ltd.
- Inventors: Kyeongju Moon; Soyoung Noh; Hyunsoo Shin; Wonkyung Kim
- Web page: https://patentgrep.com/patent/US10121899B2

## CPC

- H10D 30/6704: {having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device}
- H10D 30/6723: {having light shields}
- H10D 30/6731: {Top-gate only TFTs}
- H10D 30/6745: {Polycrystalline or microcrystalline silicon}
- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- H10D 86/0221: {comprising manufacture, treatment or patterning of TFT semiconductor bodies}
- H10D 86/40: characterised by multiple TFTs
- H10D 86/421: {having a particular composition, shape or crystalline structure of the active layer}
- H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO}
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 86/60: wherein the TFTs are in active matrices
- H10K 59/00: Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K 59/12: Active-matrix OLED [AMOLED] displays
- H10K 59/1201: {Manufacture or treatment}
- H10K 59/1216: {the pixel elements being capacitors}
- H10K 59/122: Pixel-defining structures or layers, e.g. banks
- H10K 59/123: Connection of the pixel electrodes to the thin film transistors [TFT]
- H10K 59/124: Insulating layers formed between TFT elements and OLED elements
- H10K 59/126: Shielding, e.g. light-blocking means over the TFTs
- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- H10K 59/38: comprising colour filters or colour changing media [CCM]
- G02F 1/134309: {characterised by their geometrical arrangement}
- G02F 1/134372: {for fringe field switching [FFS] where the common electrode is not patterned}
- G02F 1/136286: {Wiring, e.g. gate line, drain line}
- G02F 1/1368: in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)}
- G02F 2201/121: common or background
- H10K 59/1213: {the pixel elements being TFTs}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS

## Abstract

A thin film transistor substrate includes a first thin film transistor disposed having a polycrystalline semiconductor layer, a first gate electrode on the polycrystalline semiconductor layer, a first source electrode and a first drain electrode; a first gate insulating layer between the polycrystalline semiconductor layer and the first gate electrode; a second thin film transistor disposed having an oxide semiconductor layer on the first gate electrode, a second gate electrode on the oxide semiconductor layer, a second source electrode and a second drain electrode; an intermediate insulating layer disposed on the first gate electrode and under the oxide semiconductor layer; and a second gate insulating layer on the intermediate insulating layer and under the first source electrode, the first drain electrode and the second gate electrode.

## Claims

### Claim 1

A thin film transistor substrate, comprising:
a first thin film transistor including:
a polycrystalline semiconductor layer;
a first gate electrode on the polycrystalline semiconductor layer;
a first source electrode; and
a first drain electrode;
a first gate insulating layer between the polycrystalline semiconductor layer and the first gate electrode;
a second thin film transistor including:
an oxide semiconductor layer on the first gate electrode;
a second gate electrode on the oxide semiconductor layer;
a second source electrode; and
a second drain electrode;
an intermediate insulating layer on the first gate electrode and under the oxide semiconductor layer; and
a second gate insulating layer on the intermediate insulating layer and including;
a first portion under the first source electrode;
a second portion under the first drain electrode; and
a third portion under the second gate electrode,
wherein the first portion, the second portion, and the third portion are separated from each other by a passivation layer above the first source electrode and the first drain electrode.

### Claim 2 (depends on 1)

The thin film transistor substrate of claim 1, wherein:
the first source electrode contacts the polycrystalline semiconductor layer through a first source contact hole penetrating the second gate insulating layer, the intermediate insulating layer, and the first gate insulating layer;
the first drain electrode contacts the polycrystalline semiconductor layer through a first drain contact hole penetrating the second gate insulating layer, the intermediate insulating layer, and the first gate insulating layer; and
the second gate electrode overlaps middle portions of the oxide semiconductor layer having the second gate insulating layer there-between.

### Claim 3 (depends on 2)

The thin film transistor substrate of claim 2, wherein the second gate insulating layer includes:
the first portion having a same shape as the first source electrode;
the second portion having a same shape as the first drain electrode; and
the third portion having a same shape as the second gate electrode.

### Claim 4 (depends on 1)

The thin film transistor substrate according to claim 1, wherein the intermediate insulating layer includes:
a nitride layer; and
an oxide layer on the nitride layer.

### Claim 5 (depends on 1)

The thin film transistor substrate of claim 1, further comprising:
a first light shielding layer under the polycrystalline semiconductor layer; and
a second light shielding layer formed at a same layer and of a same material as the first gate electrode, and disposed under the oxide semiconductor layer.

### Claim 6 (depends on 1)

The thin film transistor substrate of claim 1, wherein the first source electrode, the first drain electrode, and the second gate electrode are in a same layer and of a same material.

### Claim 7

A thin film transistor substrate, comprising:
a first semiconductor layer including a polycrystalline semiconductor material;
a first gate insulating layer covering the first semiconductor layer;
a first gate electrode on the first gate insulating layer and overlapping the first semiconductor layer;
an intermediate insulating layer covering the first gate electrode;
a second semiconductor layer disposed on the intermediate insulating layer, including an oxide semiconductor material;
a second gate insulating layer on the intermediate insulating layer and the second semiconductor layer, and including a first portion, a second portion, and a third portion respectively overlapping one side of the first semiconductor layer, another side of the first semiconductor layer, and a middle portion of the second semiconductor layer;
a second gate electrode on the second gate insulating layer and overlapping the middle portions of the second semiconductor layer;
a first source electrode on the second gate insulating layer, and connecting the one side of the first semiconductor layer; and
a first drain electrode on the second gate insulating layer, and connecting the another side of the first semiconductor layer,
wherein the first portion, the second portion, and the third portion are separated from each other by a passivation layer above the first source electrode and the first drain electrode.

### Claim 8 (depends on 7)

The thin film transistor substrate of claim 7, wherein:
the first source electrode contacts the one side of the first semiconductor layer through a first source contact hole penetrating the second gate insulating layer, the intermediate insulating layer, and the first gate insulating layer; and
the first drain electrode contacts the another side of the first semiconductor layer through a first drain contact hole penetrating the second gate insulating layer, the intermediate insulating layer, and the first gate insulating layer.

### Claim 9 (depends on 8)

The thin film transistor substrate of claim 8, wherein the second gate insulating layer includes:
the first portion having a same shape as the first source electrode;
the second portion having a same shape as the first drain electrode; and
the third portion having a same shape as the second gate electrode.

### Claim 10 (depends on 7)

The thin film transistor substrate of claim 7, wherein the intermediate insulating layer includes:
a nitride layer; and
an oxide layer on the nitride layer.

### Claim 11 (depends on 7)

The thin film transistor substrate of claim 7, further comprising:
a passivation layer covering the first source electrode, the first drain electrode, and the second gate electrode; and
a second source electrode and a second drain electrode disposed on the passivation layer, and respectively connecting one side of the second semiconductor layer and another side of the second semiconductor layer.

### Claim 12 (depends on 7)

The thin film transistor substrate of claim 7, wherein the first source electrode, the first drain electrode, and the second gate electrode are in a same layer and of a same material.