# US 10,121,877 B1 · Vertical field effect transistor with metallic bottom region

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- Number: US 10,121,877 B1
- Document ID: US10121877B1
- Status: Granted
- Kind: B1
- Application number: 15/703,130
- Filed: 2017-09-13
- Granted: 2018-11-06
- Earliest claimed: 2017-09-13
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Terence B. Hook; Joshua M. Rubin; Tenko Yamashita
- Web page: https://patentgrep.com/patent/US10121877B1

## CPC

- H10D 30/025: {of vertical IGFETs (of VDMOS H10D30/0291; of vertical TFTs H10D30/0318)}
- H10D 30/026: {having laterally-coplanar source and drain regions, a gate at the sides of the bulk channel, and both horizontal and vertical current flow (of LDMOS H10D30/0289)}
- H10D 30/031: {of thin-film transistors [TFT]}
- H10D 30/0318: {of vertical TFTs}
- H10D 30/63: Vertical IGFETs (H10D30/66 {, H10D30/6728, H10D30/689, H10D30/693} take precedence)
- H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes}
- H10D 30/6728: {Vertical TFTs}
- H10D 30/6729: {characterised by the electrodes}
- H10D 64/251: {Source or drain electrodes for field-effect devices}
- H10D 64/252: {for vertical or pseudo-vertical devices}
- H10D 64/2523: {for vertical devices wherein the source or drain electrodes extend entirely through semiconductor bodies}
- H10D 64/62: Electrodes ohmically coupled to a semiconductor
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A method for fabricating a semiconductor device includes forming a semiconductor fin over a substrate. A first doped region is formed on a first end of the semiconductor fin. A second doped region is formed on a second end of the semiconductor fin. An extended contact is formed on the second doped region. A portion of the extended contact extends past an end of the semiconductor fin in a direction orthogonal to a channel of the semiconductor fin. A contact extension is formed on the portion of the extended contact extending past the end of the semiconductor fin. A contact is formed on the first doped region.

## Claims

### Claim 1

A method for fabricating a semiconductor device, the method comprising:
forming a semiconductor fin over a substrate;
forming a first doped region on a first end of the semiconductor fin;
forming a second doped region on a second end of the semiconductor fin;
forming an extended contact on the second doped region, a portion of the extended contact extending past an end of the semiconductor fin in a direction orthogonal to a channel of the semiconductor fin;
forming a contact extension on the portion of the extended contact extending past the end of the semiconductor fin; and
forming a contact on the first doped region, wherein each of the extended contact, the contact on the first doped region, and the contact extension comprises metal.

### Claim 2 (depends on 1)

The method of claim 1 further comprising removing the substrate prior to forming the contact extension on the portion of the extended contact extending past the end of the semiconductor fin.

### Claim 3 (depends on 1)

The method of claim 1, wherein each of the extended contact, the contact on the first doped region, and the contact extension comprises one or more of cobalt, tungsten, and copper.

### Claim 4 (depends on 1)

The method of claim 1, wherein forming each of the contact on the first doped region and the contact extension comprises etching through a dielectric material.

### Claim 5 (depends on 4)

The method of claim 4, wherein forming the contact extension comprises depositing the metal in a first trench formed by etching through the dielectric.

### Claim 6 (depends on 4)

The method of claim 4 further comprising forming a conductive gate surrounding sidewalls of the semiconductor fin.

### Claim 7 (depends on 5)

The method of claim 5 further comprising forming a conductive gate contact on the conductive gate.

### Claim 8 (depends on 7)

The method of claim 7, wherein forming the conductive gate contact on the conductive gate comprises etching through the dielectric material to form a second trench.

### Claim 9 (depends on 8)

The method of claim 8, wherein forming the conductive gate contact on the conductive gate further comprises depositing the metal in the second trench.

### Claim 10 (depends on 9)

The method of claim 9, wherein depositing the metal in the first trench is performed in a separate step from depositing the metal in the second trench.

### Claim 11 (depends on 10)

The method of claim 10, wherein the conductive gate contact does not extend beyond the conductive gate in a direction of the channel of the semiconductor fin.

### Claim 12 (depends on 1)

The method of claim 1, wherein the contact extension is not self-aligned with the extended contact.

### Claim 13 (depends on 1)

The method of claim 1, wherein the first doped region has a thickness of less than about 30 nm in a direction of the channel of the semiconductor fin.

### Claim 14

A method for fabricating a semiconductor device, the method comprising:
forming an etch stop layer over a substrate;
forming a semiconductor fin over the etch stop layer;
forming a first doped region on a first end the semiconductor fin;
forming a second doped region on a second end the semiconductor fin;
forming an extended contact on the second doped region and contacting the etch stop layer;
forming a contact extension on the extended contact and through the etch stop layer; and
forming a contact on a first doped region.

### Claim 15 (depends on 14)

The method of claim 14, wherein each of the extended contact, the contact on the first doped region, and the contact extension comprises metal.

### Claim 16 (depends on 14)

The method of claim 14, wherein forming each of the contact on the first doped region and the contact extension comprises etching through a dielectric material.

### Claim 17 (depends on 15)

The method of claim 15, wherein forming each of the contact on the first doped region and the contact extension further comprises etching through the etch stop material.

### Claim 18

A semiconductor device comprising:
a first end of a first doped region on a first end of the semiconductor fin;
an etch stop layer on a second end of the first doped region;
a second doped region on a second end of a semiconductor fin; and
an extended contact on the second doped region and contacting the etch stop layer, wherein the extended contact comprises metal.