# US 10,121,876 B2 · Method for high temperature annealing of a nitride semiconductor layer > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,121,876 B2 - Document ID: US10121876B2 - Status: Granted - Kind: B2 - Application number: 15/607,698 - Filed: 2017-05-30 - Published: 2018-01-18 - Granted: 2018-11-06 - Earliest claimed: 2016-07-13 - Assignees: Fuji Electric Co., Ltd. - Applicants: Fuji Electric Co., Ltd. - Inventors: Shinya Takashima; Katsunori Ueno; Masaharu Edo - Web page: https://patentgrep.com/patent/US10121876B2 ## CPC - H10D 30/025: {of vertical IGFETs (of VDMOS H10D30/0291; of vertical TFTs H10D30/0318)} - H10D 30/021: {of FETs having insulated gates [IGFET]} - H10D 30/0291: {of vertical DMOS [VDMOS] FETs} - H10D 30/0297: {using recessing of the gate electrodes, e.g. to form trench gate electrodes} - H10D 30/63: Vertical IGFETs (H10D30/66 {, H10D30/6728, H10D30/689, H10D30/693} take precedence) - H10D 30/66: Vertical DMOS [VDMOS] FETs - H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors} - H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN} - H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates} - H10P 14/3416: {Nitrides} - H10P 14/69391: {the material containing aluminium, e.g. Al2O3} - H10P 30/206: {into Group III-V semiconductors} - H10P 30/21: {of electrically active species} - H10P 30/28: characterised by an annealing step, e.g. for activation of dopants - H10P 14/6339: {deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD} - H10P 14/69433: {the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz} - H10P 32/14: within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase - H10P 32/174: {being Group III-V material} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract In case of performing annealing at a temperature of 1300° C. or higher, it is not possible to sufficiently suppress escape of nitrogen from a GaN layer even if a cap layer is provided thereon. Thereby, the front surface of the GaN layer is roughened. A semiconductor device manufacturing method of manufacturing a semiconductor device having a nitride semiconductor layer is provided. The semiconductor device manufacturing method includes: implanting, into a predetermined region of the nitride semiconductor layer, n-type or p-type impurities relative to the nitride semiconductor layer; forming, by atomic layer deposition, a first protective film containing a nitride on and in direct contact with at least the predetermined region; and annealing the nitride semiconductor layer and the first protective film at a temperature of 1300° C. or higher. ## Claims ### Claim 1 A semiconductor device manufacturing method of manufacturing a semiconductor device having a nitride semiconductor layer, the semiconductor device manufacturing method comprising: implanting, into a predetermined region of the nitride semiconductor layer, n-type or p-type impurities relative to the nitride semiconductor layer; forming, by atomic layer deposition, a first protective film containing a nitride on and in direct contact with at least the predetermined region; and annealing the nitride semiconductor layer and the first protective film at a temperature of 1300° C. or higher, wherein the implanting has implanting n-type impurities relative to the nitride semiconductor layer into another predetermined region of the nitride semiconductor layer before the implanting the p-type impurities into the predetermined region, the semiconductor device manufacturing method further comprises, before the implanting the n-type impurities, forming a third protective film that is on and in direct contact with the other predetermined region and contains one or more types among silicon and oxygen, and the first protective film is formed by the atomic layer deposition after removing the third protective film. ### Claim 2 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein the forming the first protective film by the atomic layer deposition has forming the first protective film having an aluminium nitride or a silicon nitride by supplying, onto the nitride semiconductor layer, an aluminium atom-containing gas or a silicon atom-containing gas and a nitrogen atom-containing gas alternately. ### Claim 3 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein in the forming the first protective film by the atomic layer deposition, a temperature of the nitride semiconductor layer is 600° C. or lower. ### Claim 4 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein in the forming the first protective film by the atomic layer deposition, a temperature of the nitride semiconductor layer is 300° C. or higher. ### Claim 5 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein the first protective film has a thickness of 2 nm or larger and 100 nm or smaller. ### Claim 6 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein the forming the first protective film by the atomic layer deposition has: (a) supplying trimethylaluminium onto the nitride semiconductor layer; (b) evacuating a reaction chamber in which the nitride semiconductor layer is placed; (c) irradiating the nitride semiconductor layer with plasma of a nitrogen-containing gas; and (d) evacuating the reaction chamber, and one cycle including (a) to (d) is repeated multiple times to form the first protective film. ### Claim 7 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein the nitride semiconductor layer has a trench to which a gate insulating film and a gate electrode are provided, and the first protective film is provided coating a bottom portion and a side portion of the trench. ### Claim 8 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein the implanting has implanting the p-type impurities into the predetermined region after the forming the first protective film by the atomic layer deposition. ### Claim 9 A semiconductor device manufacturing method of manufacturing a semiconductor device having a nitride semiconductor layer, the semiconductor device manufacturing method comprising: implanting, into a predetermined region of the nitride semiconductor layer, n-type or p-type impurities relative to the nitride semiconductor layer; forming, by a first type of method, a first protective film containing a nitride on and in direct contact with at least the predetermined region; forming a second protective film on and in direct contact with the first protective film by a second type of method different from the first type of method; and annealing the nitride semiconductor layer, the first protective film and the second protective film at a temperature of 1300° C. or higher, wherein the implanting has implanting n-type impurities relative to the nitride semiconductor layer into another predetermined region of the nitride semiconductor layer before the implanting the p-type impurities into the predetermined region, the semiconductor device manufacturing method further comprises, before the implanting the n-type impurities, forming a third protective film that is on and in direct contact with the other predetermined region and contains one or more types among silicon and oxygen, and the first protective film is formed by the atomic layer deposition after removing the third protective film. ### Claim 10 (depends on 9) The semiconductor device manufacturing method according to claim 9, wherein the first type of method is atomic layer deposition. ### Claim 11 (depends on 10) The semiconductor device manufacturing method according to claim 10, wherein the second type of method is sputtering. ### Claim 12 (depends on 11) The semiconductor device manufacturing method according to claim 11, wherein a material of the first protective film is the same as a material of the second protective film. ### Claim 13 (depends on 9) The semiconductor device manufacturing method according to claim 9, wherein a material of the first protective film is the same as a material of the second protective film.