# US 10,121,860 B2 · BJT structure design for 14nm FinFET device

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- Number: US 10,121,860 B2
- Document ID: US10121860B2
- Status: Granted
- Kind: B2
- Application number: 15/236,329
- Filed: 2016-08-12
- Published: 2017-03-02
- Granted: 2018-11-06
- Earliest claimed: 2015-09-01
- Assignees: Semiconductor Manufacturing International (Shanghai) Corporation; Semiconductor Manufacturing International (Beijing) Corporation
- Applicants: Semiconductor Manufacturing International (Shanghai) Corporation; Semiconductor Manufacturing International (Beijing) Corporation
- Inventors: Fei Zhou
- Web page: https://patentgrep.com/patent/US10121860B2

## CPC

- H10D 62/134: {of lateral BJTs}
- H10D 10/061: {of lateral BJTs (of heterojunction BJTs H10D10/021; of thin film BJTs H10D10/041)}
- H10D 10/60: Lateral BJTs
- H10D 62/124: {Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions}
- H10D 62/137: {Collector regions of BJTs}
- H10D 62/184: {of lateral BJTs}
- H10P 30/222: {characterised by the angle between the ion beam and the crystal planes or the main crystal surface (characterised by the angle between the ion beam and the mask H10P30/221)}
- H10P 50/642: {Chemical etching}
- H10P 50/691: {for Group IV materials or Group III-V materials}
- H10P 95/90: Thermal treatments, e.g. annealing or sintering
- H10W 20/0698: {Local interconnections}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A fin-type bipolar semiconductor device includes a base region having a first portion in a semiconductor substrate and a first semiconductor fin on the adjacent first portion, a collector region having a second portion in the semiconductor substrate and a second semiconductor fin on the adjacent second portion, and an emitter region having a third region in the semiconductor substrate and a third semiconductor fin on the adjacent third portion. The second portion is adjacent the first portion, and the third portion is adjacent the first portion and forms an emitter junction in the semiconductor substrate. The second portion is not adjacent to the third portion. The first, second, and third semiconductor fins are physically separated from each other. The fin-type bipolar device exhibits low leakage current, good linearity and uniformity of electrical characteristics to facilitate device matching.

## Claims

### Claim 1

A fin-type bipolar semiconductor device comprising:
a base region comprising a first portion in a semiconductor substrate and a first semiconductor fin adjacent to the first portion and on the first portion;
a collector region comprising a second portion in the semiconductor substrate and a second semiconductor fin adjacent to the second portion and on the second portion, the second portion adjacent to the first portion;
an emitter region comprising a third portion in the semiconductor substrate and a third semiconductor fin adjacent to the third portion and on the third portion, the third portion adjacent to the first portion and forming with the first portion an emitter junction in the semiconductor substrate;
a first liner oxide layer on the base region, the collector region, and the emitter region;
a filler material layer on the first liner oxide layer;
a second liner oxide layer on the filler material layer;
wherein the second portion is not adjacent to the third portion, and
wherein the first, second, and third semiconductor fins are physically separated from each other by the first liner oxide layer and the filler material layer.

### Claim 2 (depends on 1)

The fin-type bipolar semiconductor device of claim 1, wherein the third portion is at least partially surrounded by the first portion.

### Claim 3 (depends on 1)

The fin-type bipolar semiconductor device of claim 1, wherein the third portion is disposed on a portion of the first portion.

### Claim 4 (depends on 1)

The fin-type bipolar semiconductor device of claim 1, wherein the first and second portions form a collector junction in the semiconductor substrate.

### Claim 5 (depends on 1)

The fin-type bipolar semiconductor device of claim 1, wherein the second portion and the third portion are of a first conductivity type, the first portion is of a second conductivity type different from the first conductivity type.

### Claim 6 (depends on 5)

The fin-type bipolar semiconductor device of claim 5, wherein the second portion has a doping concentration lower than a doping concentration of the third portion.

### Claim 7 (depends on 1)

The fin-type bipolar semiconductor device of claim 1, further comprising a plurality of contact members each separately in electrical contact with one of the first semiconductor fin, the second semiconductor fin, and the third semiconductor fin.

### Claim 8 (depends on 1)

The fin-type bipolar semiconductor device of claim 1, wherein the first liner oxide layer is further disposed on a first portion of sidewalls of the semiconductor fins.

### Claim 9 (depends on 8)

The fin-type bipolar semiconductor device of claim 8, further comprising an interlayer dielectric layer on the second liner oxide layer.

### Claim 10 (depends on 9)

The fin-type bipolar semiconductor device of claim 9, further comprising a metal silicide layer on upper portions of the semiconductor fins.

### Claim 11 (depends on 10)

The fin-type bipolar semiconductor device of claim 10, further comprising a plurality of contact members each separately in electrical contact with the metal silicide layer.

### Claim 12 (depends on 11)

The fin-type bipolar semiconductor device of claim 11, wherein the interlayer dielectric layer separates the contact members of the base region, the contact members of the collector region, and the contact members of the emitter region from each other.

### Claim 13 (depends on 9)

The fin-type bipolar semiconductor device of claim 9, wherein the second liner oxide layer is further disposed on a second portion of the sidewalls of the semiconductor fins, the second portion of the sidewalls of the semiconductor fins being adjacent to the first portion of the sidewalls of the semiconductor fins.

### Claim 14 (depends on 13)

The fin-type bipolar semiconductor device of claim 13, further comprising a metal silicide layer on a top portion of each of the semiconductor fins.

### Claim 15 (depends on 14)

The fin-type bipolar semiconductor device of claim 14, wherein the top portion is adjacent to the second portion of the sidewalls of the semiconductor fins.

### Claim 16 (depends on 14)

The fin-type bipolar semiconductor device of claim 14, wherein the interlayer dielectric layer comprises a plurality of grooves exposing the metal silicide layer.

### Claim 17 (depends on 16)

The fin-type bipolar semiconductor device of claim 16, further comprising a metal layer filling the grooves and in direct contact with the metal silicide layer.