# US 10,121,849 B2 · Methods of fabricating a semiconductor structure

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,121,849 B2
- Document ID: US10121849B2
- Status: Granted
- Kind: B2
- Application number: 14/941,665
- Filed: 2015-11-16
- Published: 2017-05-18
- Granted: 2018-11-06
- Earliest claimed: 2015-11-16
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Tieh-Chiang Wu; Shing-Yih Shih
- Web page: https://patentgrep.com/patent/US10121849B2

## CPC

- H10D 1/042: {using deposition processes to form electrode extensions}
- C23C 14/0652: {Silicon nitride}
- C23C 14/08: Oxides (C23C14/10 takes precedence)
- C23C 14/10: Glass or silica
- C23C 14/16: on metallic substrates or on substrates of boron or silicon
- C23C 16/06: characterised by the deposition of metallic material
- C23C 16/345: {Silicon nitride}
- C23C 16/402: {Silicon dioxide}
- H10D 1/047: {of conductor-insulator-semiconductor capacitors, e.g. trench capacitors}
- H10D 1/62: Capacitors having potential barriers
- H10D 1/716: {having vertical extensions}
- H10P 50/242: {of Group IV materials}
- H10P 52/00: Grinding, lapping or polishing of wafers, substrates or parts of devices
- H10P 52/402: {of semiconductor materials}
- H10W 20/023: {the interconnections being through-semiconductor vias}
- H10W 20/0245: {comprising use of blind vias during the manufacture}
- H10W 20/032: {of conductive barrier, adhesion or liner layers}
- H10W 20/056: {by filling conductive material into holes, grooves or trenches}
- H10W 20/062: {by smoothing of conductive parts, e.g. by planarisation}
- H10W 20/0698: {Local interconnections}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 20/2128: {Coaxial through-semiconductor vias}
- H10W 20/054: {by selectively removing parts thereof (H10W20/034 takes precedence)}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor structure and a method of fabricating thereof are provided. The method includes the following steps. A substrate with an upper surface and a lower surface is received. A first recess extending from the upper surface to the lower surface is formed and the first recess has a first depth. A second recess extending from the upper surface to the lower surface is formed and the second recess has a second depth less than the first depth. A first conducting layer is formed in the first recess and the second recess. A first insulating layer is formed over the first conducting layer. A second conducting layer is formed over the first insulating layer and isolated from the first conducting layer with the first insulating layer. The substrate is thinned from the lower surface to expose the second conducting layer in the first recess.

## Claims

### Claim 1

A method of fabricating a semiconductor structure, comprising:
forming a first recess extending from an upper surface toward a lower surface of a material, the first recess having a first depth;
forming a second recess extending from the upper surface toward the lower surface, the second recess having a second depth less than the first depth;
forming a first insulating layer in the first recess and the second recess;
forming a first conducting layer in the first recess and the second recess and over the first insulating layer;
forming a second insulating layer over the first conducting layer and in the first recess and the second recess;
forming a second conducting layer over the second insulating layer and in the first recess and the second recess, the second conducting layer isolated from the first conducting layer with the second insulating layer;
thinning the material from the lower surface to expose the first insulating layer, the first conducting layer, the second insulating layer, and the second conducting layer in the first recess and the first insulating layer and the first conducting layer in the second recess;
forming a metal layer in direct contact with a portion of the upper surface of the material, with the first insulating layer, the first conducting layer, the second insulating layer, and the second conducting layer in the first recess, and with the second conducting layer in the second recess; and
forming another metal layer in direct contact with a portion of the lower surface of the material, with the first insulating layer, the first conducting layer, the second insulating layer, and the second conducting layer in the first recess, and with the first insulating layer and the first conducting layer in the second recess.

### Claim 2 (depends on 1)

The method of claim 1, wherein forming the first recess and forming the second recess comprises forming the first recess and the second recess by laser drilling, dry etching or wet etching.

### Claim 3 (depends on 2)

The method of claim 2, wherein forming the first recess and forming the second recess comprises forming the first recess and the second recess by reactive ion etching.

### Claim 4 (depends on 1)

The method of claim 1, wherein forming the first recess and forming the second recess comprise:
forming a photoresist layer over the upper surface of the material, the photoresist layer having a first opening and a second opening smaller than the first opening; and
etching the material through the first opening to form the first recess and through the second opening to form the second recess.

### Claim 5 (depends on 1)

The method of claim 1, wherein thinning the material from the lower surface comprises thinning the material by backside grinding, chemical-mechanical polishing or blanket etching.

### Claim 6 (depends on 1)

The method of claim 1, wherein forming the first recess and forming the second recess comprises forming a first dimension of the first recess larger than a second dimension of the second recess.

### Claim 7 (depends on 1)

The method of claim 1, wherein forming the first conducting layer and the second conducting layer comprises forming the first conducting layer and the second conducting layer by chemical vapor deposition (CVD), atomic layer deposition (ALD), physical vapor deposition (PVD) or plasma-enhanced chemical-vapor deposition (PECVD).

### Claim 8 (depends on 1)

The method of claim 1, wherein forming the first insulating layer and forming the second insulating layer comprises forming the first insulating layer and the second insulating layer by CVD, ALD, PVD or PECVD.

### Claim 9 (depends on 1)

The method of claim 1, wherein thinning the material from the lower surface to expose the first insulating layer, the first conducting layer, the second insulating layer, and the second conducting layer in the first recess comprises forming a via structure comprising the first insulating layer, the first conducting layer, the second insulating layer, and the second conducting layer in the first recess.

### Claim 10 (depends on 9)

The method of claim 9, wherein forming the metal layer in direct contact with a portion of the upper surface of the material comprises forming the metal layer in direct contact with the first insulating layer, the first conducting layer, the second insulating layer, and the second conducting layer of the via structure.

### Claim 11 (depends on 1)

The method of claim 1, wherein thinning the material from the lower surface to expose the first insulating layer, the first conducting layer, the second insulating layer, and the second conducting layer in the first recess and the first insulating layer and the first conducting layer in the second recess comprises forming a capacitor structure comprising the first insulating layer, the first conducting layer, the second insulating layer, and the second conducting layer in the second recess.

### Claim 12 (depends on 11)

The method of claim 11, wherein forming the metal layer in direct contact with a portion of the upper surface of the material comprises forming the metal layer only on the second conducting layer of the capacitor structure.

### Claim 13 (depends on 1)

The method of claim 1, wherein forming the first conducting layer in the first recess and the second recess, forming the second insulating layer over the first conducting layer and in the first recess and the second recess, and forming the second conducting layer over the second insulating layer and in the first recess and the second recess comprises completely filling the first recess and the second recess.

### Claim 14

A method of fabricating a semiconductor structure, comprising:
forming a first recess in an upper surface of a material, the first recess having a first depth;
forming a second recess in the upper surface of the material, the second recess having a second depth less than the first depth;
forming a first insulating layer in the first recess and the second recess;
forming a first conducting layer in the first recess and the second recess and over the first insulating layer;
forming a second insulating layer over the second conducting layer and in the first recess and the second recess;
forming a second conducting layer over the first insulating layer and in the first recess and the second recess;
thinning the material from a lower surface of the material to expose the first insulating layer, the first conducting layer, the second insulating layer, and the second conducting layer in the first recess and the first insulating layer and the first conducting layer in the second recess;
forming a metal in direct contact with the upper surface of the material and the first conducting layer, the first insulating layer, the second conducting layer, and the second insulating layer in the first recess and in direct contact with only the second conducting layer in the second recess; and
forming another metal in direct contact with the first insulating layer, the first conducting layer, the second insulating layer, and the second conducting layer in the first recess, with the first insulating layer and the first conducting layer in the second recess, and with only a portion of the lower surface of the material.

### Claim 15 (depends on 14)

The method of claim 14, wherein forming the second conducting layer over the first insulating layer and in the first recess and the second recess comprises forming the second conducting layer in the second recess, the second conducting layer isolated from the first conducting layer in the second recess.