# US 10,121,775 B2 · Optoelectronic semiconductor chip with built-in ESD protection > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,121,775 B2 - Document ID: US10121775B2 - Status: Granted - Kind: B2 - Application number: 15/038,034 - Filed: 2014-11-07 - Published: 2016-10-13 - Granted: 2018-11-06 - Earliest claimed: 2013-11-21 - Assignees: OSRAM Opto Semiconductors GmbH - Applicants: OSRAM Opto Semiconductors GmbH - Inventors: Christian Leirer; Berthold Hahn; Karl Engl; Johannes Baur; Siegfried Herrmann; Andreas Ploessl; Simeon Katz; Tobias Meyer; Lorenzo Zini; Markus Maute - Web page: https://patentgrep.com/patent/US10121775B2 ## CPC - H10D 89/60: Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] - H10H 20/825: containing nitrogen, e.g. GaN - H10H 20/8312: {extending at least partially through the bodies} - H10H 20/857: Interconnections, e.g. lead-frames, bond wires or solder balls - H10H 29/10: Integrated devices comprising at least one light-emitting semiconductor component covered by group H10H20/00 (active-matrix LED displays H10H29/30) - H10W 90/00: Package configurations - H10H 20/8316: {Multi-layer electrodes comprising at least one discontinuous layer} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract Described is an optoelectronic semiconductor chip (1) with a built-in bridging element (9, 9A) for overvoltage protection. ## Claims ### Claim 1 An optoelectronic semiconductor chip comprising: a semiconductor layer sequence containing semiconductor material, which sequence comprises a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type and an active zone with a pn junction, which is formed between the first and the second semiconductor region; a carrier, on which the semiconductor layer sequence is arranged; a first contact, which is provided for electrical connection of the first semiconductor region; a second contact different from the first contact, which second contact is provided for electrical connection of the second semiconductor region; and a bridging element connected parallel or antiparallel to the semiconductor layer sequence, which bridging element comprises a nonlinear electrical resistance, which is higher in the case of an operating voltage of the optoelectronic semiconductor chip in the forward direction than an electrical resistance of the semiconductor layer sequence and is lower in the case of overvoltages in the reverse direction than the electrical resistance of the semiconductor layer sequence, such that electrical charge is discharged via the bridging element in the case of overvoltages, wherein the bridging element comprises at least one bridging layer, which is arranged outside the semiconductor material of the semiconductor layer sequence, wherein the semiconductor layer sequence comprises a recess, wherein the second contact comprises a contact element, which is arranged in the recess, wherein the contact element is surrounded peripherally by the bridging element, wherein the bridging element connects together the first and second semiconductor regions and/or one semiconductor region with the respective contact, and wherein the first contact comprises a contact layer, which is interrupted by an opening, through which the contact element extends. ### Claim 2 (depends on 1) The optoelectronic semiconductor chip according to claim 1, wherein the bridging layer is not an epitaxial layer. ### Claim 3 (depends on 1) The optoelectronic semiconductor chip according to claim 1, wherein the bridging element and/or the bridging layer contain(s) a polycrystalline electroceramic material. ### Claim 4 (depends on 1) The optoelectronic semiconductor chip according to claim 1, wherein the bridging element connects together the first and second contacts. ### Claim 5 (depends on 1) The optoelectronic semiconductor chip according to claim 1, wherein the bridging element is provided at the semiconductor layer sequence. ### Claim 6 (depends on 1) The optoelectronic semiconductor chip according to claim 1, wherein the semiconductor layer sequence comprises a first major face facing the carrier and a second major face remote from the carrier and one side face, which extends at an angle to the first and second major faces, and wherein the bridging layer is arranged on the side face. ### Claim 7 (depends on 1) The optoelectronic semiconductor chip according to claim 1, wherein the recess delimited by an inner face of the semiconductor layer sequence, and wherein the bridging layer is arranged on the inner face. ### Claim 8 (depends on 1) The optoelectronic semiconductor chip according to claim 1, wherein the first contact comprises a first contact layer and the second contact comprises a second contact layer, the first contact layer and the second contact layer being connected together by the bridging element. ### Claim 9 (depends on 1) The optoelectronic semiconductor chip according to claim 1, wherein the bridging element comprises at least one of the following materials: zinc oxide, strontium oxide, strontium titanate, titanium oxide, silicon carbide. ### Claim 10 (depends on 1) The optoelectronic semiconductor chip according to claim 1, wherein the bridging element contains at least one of the following material additives: bismuth oxide, antimony oxide, cobalt oxide, manganese oxide, nickel oxide, chromium oxide and silicon oxide. ### Claim 11 (depends on 1) The optoelectronic semiconductor chip according to claim 1, wherein the bridging element is a varistor, a Schottky diode or a Zener diode. ### Claim 12 An optoelectronic semiconductor chip comprising: a semiconductor layer sequence containing semiconductor material, which sequence comprises a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type and an active zone with a pn junction, which is formed between the first and the second semiconductor region; a carrier, on which the semiconductor layer sequence is arranged; a first contact, which is provided for electrical connection of the first semiconductor region, a second contact different from the first contact, which second contact is provided for electrical connection of the second semiconductor region; and a bridging element connected parallel or antiparallel to the semiconductor layer sequence, which bridging element comprises a nonlinear electrical resistance, which is higher in the case of an operating voltage of the optoelectronic semiconductor chip in the forward direction than an electrical resistance of the semiconductor layer sequence and is lower in the case of overvoltages in the reverse direction than the electrical resistance of the semiconductor layer sequence, such that electrical charge is discharged via the bridging element in the case of overvoltages, wherein the bridging element comprises at least one bridging layer, which is arranged outside the semiconductor material of the semiconductor layer sequence, wherein the bridging element is provided at the carrier, and wherein the carrier comprises a base body and at least one connection element, which is connected electrically with the first or second contact and is at least partially embedded into the base body and/or is arranged on the base body, and wherein the carrier comprises a first connection element, which is connected electrically with the first contact, and a second connection element, which is connected electrically with the second contact, and wherein the first and second connection elements are connected together by the bridging element.