# US 10,121,767 B2 · Semiconductor storage device and manufacturing method thereof

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- Number: US 10,121,767 B2
- Document ID: US10121767B2
- Status: Granted
- Kind: B2
- Application number: 15/062,368
- Filed: 2016-03-07
- Published: 2017-03-16
- Granted: 2018-11-06
- Earliest claimed: 2015-09-10
- Assignees: Toshiba Memory Corporation
- Applicants: Toshiba Memory Corporation
- Inventors: Misa Sugimura; Akihiro Iida
- Web page: https://patentgrep.com/patent/US10121767B2

## CPC

- H10W 90/00: Package configurations
- H10W 46/00: Marks applied to devices, e.g. for alignment or identification
- H10W 74/114: {by a substrate and the encapsulations}
- H10W 46/103: {alphanumeric information, e.g. words, letters or serial numbers}
- H10W 46/401: {for identification or tracking}
- H10W 46/607: {Located on parts of packages, e.g. on encapsulations or on package substrates}
- H10W 72/073: {of die-attach connectors}
- H10W 72/075: {of bond wires}
- H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 90/732: {between stacked chips}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/752: {between stacked chips}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor storage device of the present embodiments includes a substrate, a first semiconductor chip and a sealer. The substrate has wirings. The first semiconductor chip is connected to the wirings on the substrate. The sealer has a first surface, which does not face a top surface of the first semiconductor chip and is provided with a mark, and seals the first semiconductor chip.

## Claims

### Claim 1

A semiconductor storage device being capable of being inserted to a socket of a host device, the semiconductor storage device comprising:
a substrate comprising wiring, a first substrate section, and a second substrate section;
a first semiconductor chip that is connected to the wiring on the second substrate section;
a sealer that comprises a first surface, and a second surface and seals the first semiconductor chip, the first surface not facing a top surface of the first semiconductor chip, the second surface facing a top surface of the first semiconductor chip, the first surface being connected to the second surface and being shorter than the second surface in an inserting direction into the socket; and
a mark being provided on the first surface of the sealer.

### Claim 2 (depends on 1)

The semiconductor storage device according to claim 1, wherein
the first semiconductor chip is a laminated chip in which a plurality of semiconductor chips are laminated, and
a recessed section that fastens the semiconductor storage device to a host device exists in the first surface.

### Claim 3 (depends on 2)

The semiconductor storage device according to claim 2, wherein the first surface does not face an electronic component.

### Claim 4 (depends on 2)

The semiconductor storage device according to claim 2, further comprising a passive component.

### Claim 5 (depends on 2)

The semiconductor storage device according to claim 2, further comprising a second semiconductor chip.

### Claim 6 (depends on 2)

The semiconductor storage device according to claim 2, wherein
the first surface comprises a first region and a second region sandwiching the recessed section, and
the mark is provided to at least one of the first region and the second region.

### Claim 7 (depends on 1)

The semiconductor storage device according to claim 1, wherein the mark is an engraving by a laser.

### Claim 8 (depends on 1)

The semiconductor storage device according to claim 1, wherein the sealer comprises a resin.

### Claim 9 (depends on 1)

The semiconductor storage device according to claim 1, wherein the substrate is a printed wiring board.

### Claim 10 (depends on 1)

The semiconductor storage device according to claim 1, wherein the first semiconductor chip comprises at least one of a memory chip and a controller chip.

### Claim 11 (depends on 5)

The semiconductor storage device according to claim 5, wherein the second semiconductor chip is one of a memory chip and a controller chip.

### Claim 12 (depends on 1)

The semiconductor storage device according to claim 1, wherein
the first surface of the sealer extends beyond an edge of the second substrate section.