# US 10,121,759 B2 · On-bonder automatic overhang die optimization tool for wire bonding and related methods

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,121,759 B2
- Document ID: US10121759B2
- Status: Granted
- Kind: B2
- Application number: 15/234,563
- Filed: 2016-08-11
- Published: 2017-05-04
- Granted: 2018-11-06
- Earliest claimed: 2015-11-04
- Assignees: Kulicke and Soffa Industries, Inc.
- Applicants: Kulicke and Soffa Industries, Inc.
- Inventors: Aashish Shah; Robert William Ellenberg; Stephen Babinetz; Ziauddin Ahmad; Wei Qin
- Web page: https://patentgrep.com/patent/US10121759B2

## CPC

- B23K 20/005: {Capillary welding}
- H10W 90/00: Package configurations
- H10W 72/07113: {Means for calibration}
- H10W 72/07141: {Means for applying energy, e.g. ovens or lasers}
- H10W 72/07183: {Means for monitoring}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07352: {changes in structures or sizes}
- H10W 72/075: {of bond wires}
- H10W 72/07521: {Aligning}
- H10W 72/07531: {Techniques}
- H10W 72/321: {Structures or relative sizes of die-attach connectors}
- H10W 72/536: {the connected ends being ball-shaped}
- H10W 72/5363: {the connected ends being wedge-shaped}
- H10W 72/5366: {the bond wires having kinks}
- H10W 72/551: {Materials of bond wires}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 72/951: {Materials of bond pads}
- H10W 90/231: {the stacked chips being on both top and bottom sides of an auxiliary carrier having no electrical connection structure}
- H10W 90/732: {between stacked chips}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- B23K: SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method of providing a z-axis force profile applied to a plurality of bonding locations during a wire bonding operation is provided. The method includes: (a) determining a z-axis force profile for each of a plurality of bonding locations on an unsupported portion of at least one reference semiconductor device; and (b) applying the z-axis force profile during subsequent bonding of a subject semiconductor device. Methods of: determining a maximum bond force applied to a bonding location during formation of a wire bond; and determining a z-axis constant velocity profile for formation of a wire bond, are also provided.

## Claims

### Claim 1

A method of a determining a maximum bond force to be applied to a bonding location during formation of a wire bond, the method comprising the steps of:
(a) providing a maximum z-axis deflection value for a semiconductor device;
(b) measuring z-axis deflection values at a plurality of bonding locations on at least one reference semiconductor device at a plurality of bond force values; and
(c) determining the maximum bond force for each of the bonding locations.

### Claim 2 (depends on 1)

The method of claim 1 wherein the z-axis deflection values are measured using a z-axis encoder of a bond head assembly of a wire bonding machine.

### Claim 3 (depends on 1)

The method of claim 1 wherein step (c) includes determining the maximum bond force as a single value that may be applied to each of the bonding locations.

### Claim 4 (depends on 1)

The method of claim 1 wherein step (c) includes determining the maximum bond force as a plurality of values, each of the bonding locations having a corresponding maximum bond force included in the plurality of values.

### Claim 5 (depends on 1)

The method of claim 1 wherein step (a) includes a user providing the maximum z-axis deflection value.

### Claim 6

A method of determining a z-axis constant velocity profile for formation of a wire bond, the method comprising the steps of:
(a) providing a maximum z-axis deflection value for a semiconductor device;
(b) measuring z-axis deflection values at a plurality of bonding locations on at least one reference semiconductor device at a plurality of z-axis constant velocity profiles; and
(c) determining a z-axis constant velocity profile for each of the bonding locations.

### Claim 7 (depends on 6)

The method of claim 6 wherein the z-axis deflection values are measured using a z-axis encoder of a bond head assembly of a wire bonding machine.

### Claim 8 (depends on 6)

The method of claim 6 wherein step (c) includes determining the z-axis constant velocity profile as a single profile that may be applied to each of the bonding locations.

### Claim 9 (depends on 6)

The method of claim 6 wherein step (c) includes determining the z-axis constant velocity profile as a plurality of profiles, each of the bonding locations having a corresponding z-axis constant velocity profile included in the plurality of profiles.

### Claim 10 (depends on 6)

The method of claim 6 wherein step (a) includes a user providing the maximum z-axis deflection value.

### Claim 11 (depends on 6)

The method of claim 6 wherein the z-axis constant velocity profile is a z-axis slope during a predetermined period of time.
