# US 10,121,752 B2 · Surface finishes for interconnection pads in microelectronic structures > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,121,752 B2 - Document ID: US10121752B2 - Status: Granted - Kind: B2 - Application number: 15/545,670 - Filed: 2015-02-25 - Published: 2018-01-18 - Granted: 2018-11-06 - Earliest claimed: 2015-02-25 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Srinivas V. Pietambaram; Kyu Oh Lee - Web page: https://patentgrep.com/patent/US10121752B2 ## CPC - C22C 13/00: Alloys based on tin - B23K 35/262: {Sn as the principal constituent} - C22C 19/03: based on nickel - H10W 70/65: Shapes or dispositions of interconnections - H10W 70/66: Conductive materials thereof - H10W 72/019: {of bond pads} - H10W 72/072: {of bump connectors} - H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias} - H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu} - H10W 72/29: Bond pads specially adapted therefor - H10W 72/923: {Bond pads having multiple stacked layers} - H10W 72/942: {relative to underlying supporting features, e.g. bond pads, RDLs or vias} - H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - C22C: ALLOYS (treatment of alloys C21D, C22F) - B23K: SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A surface finish may be formed in a microelectronic structure, wherein the surface finish may include a multilayer interlayer structure. Thus, needed characteristics, such as compliance and electro-migration resistance, of the interlayer structure may be satisfied by different material layers, rather attempting to achieve these characteristics with a single layer. In one embodiment, the multilayer interlayer structure may comprises a two-layer structure, wherein a first layer is formed proximate a solder interconnect and comprises a material which forms a ductile joint with the solder interconnect, and a second layer comprising a material having strong electro-migration resistance formed between the first layer and an interconnection pad. In a further embodiment, third layer may be formed adjacent the interconnection pad comprising a material which forms a ductile joint with the interconnection pad. ## Claims ### Claim 1 A microelectronic structure, comprising: an interconnection pad; a surface finish on the interconnection pad, wherein the surface finish comprises a multilayer interlayer structure including a first ductile layer on the interconnection pad, at least one electro-migration resistant layer on the first ductile layer, and a second ductile layer on the at least one electro-migration resistant layer, wherein the first ductile layer and the second ductile layer each comprises a nickel-containing material having a phosphorus content of between about 2% and 10% by weight and wherein the at least one electromigration resistant layer has a phosphous content of between about 11% and 20% by weight; and a solder interconnect on the surface finish. ### Claim 2 (depends on 1) The microelectronic structure of claim 1, wherein the at least one electro-migration resistant layer comprises a high atomic weight metal. ### Claim 3 (depends on 2) The microelectronic structure of claim 2, wherein the high atomic weight metal is selected from the group consisting of nickel, cobalt, and iron. ### Claim 4 (depends on 1) The microelectronic structure of claim 1, wherein the electro-migration resistant layer comprises a metal selected from the group consisting of nickel, cobalt, and iron in combination with a refractory metal. ### Claim 5 (depends on 4) The microelectronic structure of claim 4, wherein the electro-migration resistant layer further comprises phosphorus, and wherein the refractory metal is selected from the group consisting of tungsten, molybdenum, and rhenium. ### Claim 6 (depends on 1) The microelectronic structure of claim 1, wherein the at least one electro-migration resistant layer comprises an amorphous layer. ### Claim 7 A method of fabricating a microelectronic structure, comprising: forming an interconnection pad; forming a surface finish on the interconnection pad, wherein the surface finish comprises a multilayer interlayer structure including a first ductile layer on the interconnection pad, at least one electro-migration resistant layer on the first ductile layer, and a second ductile layer on the at least one electro-migration resistant layer, wherein the first ductile layer and the second ductile layer each comprise a nickel-containing material having a phosphorus content of between about 2% and 10% by weight and wherein the at least one electromigration resistant layer has a phosphous content of between about 11% and 20% by weight; and forming a solder interconnect on the surface finish. ### Claim 8 (depends on 7) The method of claim 7, wherein forming the surface finish comprises forming the at least one electro-migration resistant layer comprising a high atomic weight metal. ### Claim 9 (depends on 8) The method of claim 8, wherein forming the surface finish comprises forming the high atomic weight metal selected from the group consisting of nickel, cobalt, and iron. ### Claim 10 (depends on 7) The method of claim 7, wherein forming the surface finish comprises forming the electro-migration resistant selected from the group consisting of nickel, cobalt, and iron in combination with a refractory metal. ### Claim 11 (depends on 10) The method of claim 10, wherein forming the electro-migration resistant layer further comprises phosphorus, and wherein forming the refractory metal comprises metal is selected from the group consisting of tungsten, molybdenum, and rhenium. ### Claim 12 (depends on 7) The method of claim 7, wherein forming the at least one electro-migration resistant layer comprises forming an amorphous layer. ### Claim 13 An electronic system, comprising: a board; and a microelectronic structure attached to the board, wherein at least one of the microelectronic structure and the board includes: an interconnection pad; a surface finish on the interconnection pad, wherein the surface finish comprises a multilayer interlayer structure including a first ductile layer on the interconnection pad, at least one electro-migration resistant layer on the first ductile layer, and a second ductile layer on the at least one electro-migration resistant layer, wherein the first ductile layer and the second ductile layer each comprise a nickel-containing material having a phosphorus content of between about 2% and 10% by weight and wherein the at least one electromigration resistant layer has a phosphous content of between about 11% and 20% by weight; and a solder interconnect on the surface finish. ### Claim 14 (depends on 13) The electronic system of claim 13, wherein the at least one electro-migration resistant layer comprises a high atomic weight metal. ### Claim 15 (depends on 14) The electronic system of claim 14, wherein the high atomic weight metal is selected from the group consisting of nickel, cobalt, and iron. ### Claim 16 (depends on 13) The electronic system of claim 13, wherein the electro-migration resistant layer comprises a metal selected from the group consisting of nickel, cobalt, and iron in combination with a refractory metal. ### Claim 17 (depends on 16) The electronic system of claim 16, wherein the electro-migration resistant layer further comprises phosphorus, and wherein the refractory metal is selected from the group consisting of tungsten, molybdenum, and rhenium. ### Claim 18 (depends on 13) The electronic system of claim 13, wherein the at least one electro-migration resistant layer comprises an amorphous layer.