# US 10,121,746 B2 · Semiconductor device

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- Number: US 10,121,746 B2
- Document ID: US10121746B2
- Status: Granted
- Kind: B2
- Application number: 15/814,833
- Filed: 2017-11-16
- Published: 2018-05-24
- Granted: 2018-11-06
- Earliest claimed: 2016-11-22
- Assignees: Murata Manufacturing Co., Ltd.
- Applicants: Murata Manufacturing Co., Ltd.
- Inventors: Kazuya Kobayashi; Yuichi Sano; Daisuke Tokuda; Hiroaki Tokuya
- Web page: https://patentgrep.com/patent/US10121746B2

## CPC

- H10W 20/435: {Cross-sectional shapes or dispositions of interconnections}
- H10W 20/42: Vias, e.g. via plugs
- H10W 20/47: comprising two or more dielectric layers having different properties, e.g. different dielectric constants
- H10W 72/90: Bond pads, in general
- H10W 74/137: {the encapsulations being directly on the semiconductor body (H10W74/134 takes precedence)}
- H10W 72/551: {Materials of bond wires}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/921: {Structures or relative sizes of bond pads}
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/9232: {with additional elements interposed between layers}
- H10W 72/934: {Cross-sectional shape, i.e. in side view}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device includes a semiconductor substrate, a first metal layer, an insulation layer, an organic layer, and a second metal layer. The first metal layer, the insulation layer, the organic layer, and the second metal layer are sequentially stacked on a surface of the semiconductor substrate. The first metal layer and the second metal layer are electrically connected to each other through vias formed in the insulation layer and the organic layer. The second metal layer includes an electrode pad at a position corresponding to the positions of the vias. At the interface between the surface of the semiconductor substrate and the first metal layer, a patch portion having a trapezoidal cross-sectional shape is disposed directly below the vias.

## Claims

### Claim 1

A semiconductor device comprising:
a semiconductor substrate;
a first metal layer;
an inorganic insulation layer;
an organic insulation layer; and
a second metal layer,
wherein the first metal layer, the inorganic insulation layer, the organic insulation layer, and the second metal layer are stacked on or over a surface of the semiconductor substrate,
wherein the organic insulation layer includes a hollow portion and the hollow portion is a through-hole or a blind hole,
wherein the semiconductor device further comprises a patch portion raising a bottom of the hollow portion, and the patch portion is disposed in a region between the surface of the semiconductor substrate and the hollow portion of the organic insulation layer in a thickness direction, and
wherein the patch portion has a trapezoidal cross-sectional shape, and an area of a bottom surface of the patch portion is larger than an area of an upper surface of the patch portion.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1,
wherein an angle between a base and a lateral side of the trapezoidal cross-sectional shape of the patch portion is in a range of 20° to 70°.

### Claim 3 (depends on 2)

The semiconductor device according to claim 2,
wherein the hollow portion is a through-hole, and
wherein the area of the bottom surface of the patch portion is larger than an opening area of the through-hole.

### Claim 4 (depends on 2)

The semiconductor device according to claim 2,
wherein the second metal layer includes an electrode pad having a surface exposed at a position corresponding to a position of the hollow portion of the organic insulation layer.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1,
wherein the hollow portion is a through-hole, and
wherein the area of the bottom surface of the patch portion is larger than an opening area of the through-hole.

### Claim 6 (depends on 5)

The semiconductor device according to claim 5,
wherein the second metal layer includes an electrode pad having a surface exposed at a position corresponding to a position of the hollow portion of the organic insulation layer.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1,
wherein the second metal layer includes an electrode pad having a surface exposed at a position corresponding to a position of the hollow portion of the organic insulation layer.