# US 10,121,739 B1 · Multi-die inductors with coupled through-substrate via cores

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- Number: US 10,121,739 B1
- Document ID: US10121739B1
- Status: Granted
- Kind: B1
- Application number: 15/584,881
- Filed: 2017-05-02
- Published: 2018-11-08
- Granted: 2018-11-06
- Earliest claimed: 2017-05-02
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Kyle K. Kirby
- Web page: https://patentgrep.com/patent/US10121739B1

## CPC

- H10W 20/497: {Inductive arrangements or effects of, or between, wiring layers}
- H01F 17/0033: {with the coil helically wound around a magnetic core}
- H01F 27/2809: {on stacked layers}
- H10W 20/0245: {comprising use of blind vias during the manufacture}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 20/2134: {TSVs extending from the semiconductor wafer into back-end-of-line layers}
- H10W 90/00: Package configurations
- H01F 17/06: with core substantially closed in itself, e.g. toroid
- H01F 2017/0086: {on semiconductor substrate}
- H10W 44/501: {Inductive arrangements (H10W44/20 takes precedence)}
- H10W 72/01: {Manufacture or treatment}
- H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips}
- H10W 90/722: {between stacked chips}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H01F: MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES

## Abstract

A semiconductor device comprising first and second dies is provided. The first die includes a first through-substrate via (TSV) extending at least substantially through the first die and a first substantially helical conductor disposed around the first TSV. The second die includes a second TSV coupled to the first TSV and a second substantially helical conductor disposed around the second TSV. The first substantially helical conductor is configured to induce a change in a magnetic field in the first and second TSVs in response to a first changing current in the first substantially helical conductor, and the second substantially helical conductor is configured to have a second changing current induced therein in response to the change in the magnetic field in the second TSV.

## Claims

### Claim 1

A semiconductor device, comprising:
a first die including:
a first through-substrate via (TSV) extending at least substantially through the first die, and
a first substantially helical conductor disposed around the first TSV; and
a second die including:
a second TSV coupled to the first TSV, and
a second substantially helical conductor disposed around the second TSV,
wherein the second TSV is coupled to the first TSV by a solder connection, and wherein the solder connection is separated from the first and second TSVs by a barrier material configured to prevent solder diffusion into the first and second TSVs.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the first substantially helical conductor is configured to induce a change in a magnetic field in the first and second TSVs in response to a first changing current in the first substantially helical conductor, and wherein the second substantially helical conductor is configured to have a second changing current induced therein in response to the change in the magnetic field in the second TSV.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the solder connection comprises a magnetic material.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the first TSV and the second TSV are coaxially aligned.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the first and second TSVs comprise a ferromagnetic or a ferrimagnetic material.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein the first TSV is separated from the first substantially helical conductor by an insulating material, and the second TSV is separated from the second substantially helical conductor by an insulating material.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the first substantially helical conductor comprises more than one turn around the first TSV, and the second substantially helical conductor comprises more than one turn around the second TSV.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein the first substantially helical conductor is coaxially aligned with the first TSV.

### Claim 9 (depends on 1)

The semiconductor device of claim 1, wherein the second substantially helical conductor is coaxially aligned with the second TSV.

### Claim 10

A semiconductor device, comprising:
a first die including:
a first through-substrate via (TSV) extending at least substantially through the first die,
a second TSV extending at least substantially through the first die, and
a first substantially helical conductor disposed around one of the first and second TSVs,
a second die including:
a third TSV coupled to the first TSV,
a fourth TSV coupled to the second TSV, and
a second substantially helical conductor disposed around one of the third and fourth TSVs,
wherein the third TSV is coupled to the first TSV by a first solder connection, wherein the fourth TSV is coupled to the second TSV by a second solder connection, and wherein the first solder connection is separated from the first and third TSVs by a barrier material configured to prevent solder diffusion into the first and third TSVs.

### Claim 11 (depends on 10)

The semiconductor device of claim 10, wherein the first substantially helical conductor is configured to induce a change in a magnetic field in the first, second, third and fourth TSVs in response to a first changing current in the first substantially helical conductor, and wherein the second substantially helical conductor is configured to have a second changing current induced therein in response to the change in the magnetic field in the TSV around which the second substantially helical conductor is disposed.

### Claim 12 (depends on 10)

The semiconductor device of claim 10, wherein the first, second, third and fourth TSVs comprise a ferromagnetic or a ferrimagnetic material.

### Claim 13 (depends on 10)

The semiconductor device of claim 10, wherein the second TSV is coupled to the first TSV by an upper coupling member above the first substantially helical conductor.

### Claim 14 (depends on 13)

The semiconductor device of claim 13, wherein the upper coupling member comprises a ferromagnetic or a ferrimagnetic material.

### Claim 15 (depends on 10)

The semiconductor device of claim 10, wherein the fourth TSV is coupled to the third TSV by a lower coupling member below the second substantially helical conductor.

### Claim 16 (depends on 15)

The semiconductor device of claim 15, wherein the lower coupling member comprises a ferromagnetic or a ferrimagnetic material.

### Claim 17 (depends on 10)

The semiconductor device of claim 10, wherein the third and fourth TSVs extend at least substantially through the second die.

### Claim 18 (depends on 10)

The semiconductor device of claim 10, wherein the second solder connection is separated from the second and fourth TSVs by a barrier material configured to prevent solder diffusion into the second and fourth TSVs.

### Claim 19 (depends on 10)

The semiconductor device of claim 10, wherein the first and second solder connections comprise a magnetic material.

### Claim 20 (depends on 10)

The semiconductor device of claim 10, wherein the first substantially helical conductor is disposed around the first TSV, and the second substantially helical conductor is disposed around the third TSV.