# US 10,121,712 B2 · Accelerated failure test of coupled device structures under direct current bias > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,121,712 B2 - Document ID: US10121712B2 - Status: Granted - Kind: B2 - Application number: 15/087,187 - Filed: 2016-03-31 - Published: 2016-10-06 - Granted: 2018-11-06 - Earliest claimed: 2015-04-06 - Assignees: Drexel University - Applicants: Hessam Ghassemi; Andrew C. Lang; Mitra L. Taheri - Inventors: Hessam Ghassemi; Andrew C. Lang; Mitra L. Taheri - Web page: https://patentgrep.com/patent/US10121712B2 ## CPC - H10P 74/273: {Interconnections for measuring or testing, e.g. probe pads} - G01R 31/2642: {Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests} - H10P 74/203: {Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects} - H10P 74/207: {Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics} - G01R 31/2644: {Adaptations of individual semiconductor devices to facilitate the testing thereof} - H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs} - H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN} - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A method of conducting an in situ reliability test on a cross-section of a device with layered structure at micron-scale and at least two electrodes. The method includes steps of locating an electron transparent cross-sectional portion of the device in a holder and transmitting a direct current bias voltage to the cross-sectional portion of the device through at least two electrodes of the device, and observing and quantifying the microstructural changes of the device cross-section on the holder. A system for conducting an in situ reliability test on a device with a layered structure at a micron-scale and at least two electrodes is also provided. ## Claims ### Claim 1 A method of conducting a reliability test on a device having a layered structure and at least two electrodes the method comprising the steps of: locating an electron transparent cross-sectional portion of the device in a holder to form an electrical circuit including the cross-sectional portion of the device via portions of at least two electrodes in the cross-sectional portion of the device; transmitting a direct current bias voltage from the holder to the cross-sectional portion of the device via the at least two electrodes of the device; and observing and quantifying the microstructural changes of the cross-sectional portion of the device located in the holder depositing a protection layer on a surface on the device where the electrodes are located; drilling holes through the protection layer to access each of the electrodes; depositing a conductive material in the drilled holes to form protruding outreach electrodes for the device; and removing an electron transparent cross-sectional portion of an area of interest in the device including at least a portion of two of said electrodes and corresponding protruding outreach electrodes. ### Claim 2 (depends on 1) The method of claim 1, further comprising a step of thinning the cross-sectional portion to be electron transparent prior to locating the cross-sectional portion in the holder. ### Claim 3 (depends on 2) The method of claim 2, wherein the step of thinning is carried out using a focused ion beam or ion milling. ### Claim 4 (depends on 1) The method of claim 1, further comprising a step of electrically connecting the holder to the electrodes of the cross-sectional portion of the device using an electrically conductive epoxy. ### Claim 5 (depends on 1) The method of claim 1, wherein the direct current bias voltage is up to about 40% higher than a critical voltage of the device. ### Claim 6 (depends on 1) The method of claim 1, wherein the direct current bias voltage is transmitted to the cross-sectional portion of the device for a period of from about 3 seconds to about 200 minutes. ### Claim 7 (depends on 1) The method of claim 1, wherein the observing step is carried out simultaneously with the transmitting step. ### Claim 8 (depends on 1) The method of claim 1, wherein the observing step comprises recording of microstructural changes in the cross-sectional portion of the device. ### Claim 9 (depends on 1) The method of claim 1, wherein the step of depositing a protection layer is carried out by vapor deposition. ### Claim 10 (depends on 9) The method of claim 9, wherein the vapor deposition is physical vapor deposition or chemical vapor deposition. ### Claim 11 (depends on 1) The method of claim 1, wherein the protection layer comprises one or more metal oxides, one or more metal hydroxides, or combinations of the two. ### Claim 12 (depends on 11) The method of claim 11, wherein the metal oxide is selected from the group consisting of oxides of silicon, aluminum, zirconium, magnesium, calcium, iron, yttrium, cerium, zinc and combinations thereof. ### Claim 13 (depends on 11) The method of claim 11, wherein the metal hydroxide is selected from the group consisting of hydroxides of silicon, aluminum, zirconium, magnesium, calcium, iron, yttrium, cerium, zinc and combinations thereof. ### Claim 14 (depends on 1) The method of claim 1, wherein the protection layer comprises magnesium oxide. ### Claim 15 (depends on 1) The method of claim 1 wherein the depositing of a conductive material comprises melting the conductive material using a technique selected from the group consisting of laser heating, electron beam heating, focused ion beam heating and electric arc. ### Claim 16 (depends on 1) The method of claim 1, wherein the conductive material is selected from the group consisting of Sn, Y, Ho, Pb, Bi, Li, Al, Ga, Sb, Si, Cd, Mg, Co, Ni, Zr, Hf, Sc, Yb, Lu, Fe, Nb, Ta, W, Te, Au, Pt, Ge and combinations thereof. ### Claim 17 (depends on 1) The method of claim 1, wherein the conductive material is W or Pt. ### Claim 18 (depends on 1) The method of claim 1, wherein the electron transparent cross-sectional portion of the device has a thickness of from about 0.5 μm to about 3.5 μm. ### Claim 19 (depends on 1) The method of claim 1, wherein the device is a high electron mobility transistor.