# US 10,121,667 B2 · Creation of hyperdoped semiconductors with concurrent high crystallinity and high sub-bandgap absorptance using nanosecond laser annealing

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,121,667 B2
- Document ID: US10121667B2
- Status: Granted
- Kind: B2
- Application number: 15/524,539
- Filed: 2015-11-12
- Published: 2017-12-21
- Granted: 2018-11-06
- Earliest claimed: 2014-11-12
- Assignees: President and Fellows of Harvard College
- Applicants: President and Fellows of Harvard College
- Inventors: Eric Mazur; Benjamin Franta; Michael J. Aziz; David Pastor
- Web page: https://patentgrep.com/patent/US10121667B2

## CPC

- H10P 34/422: {using incoherent radiation}
- B23K 26/0624: {using ultrashort pulses, i.e. pulses of 1 ns or less}
- B23K 26/0732: {into a rectangular shape}
- B23K 26/0738: {into a linear shape}
- H10D 62/118: {Nanostructure semiconductor bodies}
- H10F 10/14: Photovoltaic cells having only PN homojunction potential barriers
- H10F 30/221: the potential barrier being a PN homojunction
- H10F 71/121: {The active layers comprising only Group IV materials}
- H10F 71/128: {Annealing}
- H10F 71/131: {Recrystallisation; Crystallization of amorphous or microcrystalline semiconductors}
- H10F 77/1223: characterised by the dopants
- H10F 77/16: Material structures, e.g. crystalline structures, film structures or crystal plane orientations
- H10F 77/703: {of the semiconductor bodies, e.g. textured active layers}
- H10P 14/3411: {Silicon, silicon germanium or germanium}
- H10P 34/42: with electromagnetic radiation, e.g. laser annealing (laser cutting H10P54/20)
- H10P 14/3816: {Pulsed laser beam}
- Y02E 10/547: Monocrystalline silicon PV cells
- Y02P 70/50: Manufacturing or production processes characterised by the final manufactured product
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- B23K: SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS

## Abstract

In one aspect, a method of processing a semiconductor substrate is disclosed, which comprises incorporating at least one dopant in a semiconductor substrate so as to generate a doped polyphase surface layer on a light-trapping surface, and optically annealing the surface layer via exposure to a plurality of laser pulses having a pulsewidth in a range of about 1 nanosecond to about 50 nanoseconds so as to enhance crystallinity of said doped surface layer while maintaining high above-bandgap, and in many embodiments sub-bandgap optical absorptance.

## Claims

### Claim 1

A method of processing a semiconductor substrate, comprising:
incorporating at least one dopant in a semiconductor substrate so as to generate a doped polyphase surface layer,
optically annealing said surface layer via exposure to a plurality of laser pulses having a pulsewidth in a range of about 1 nanosecond to about 50 nanoseconds so as to enhance crystallinity of said doped surface layer,
wherein said incorporating step comprises:
irradiating a surface of the semiconductor substrate with one or more laser pulses having a pulse width in a range of about 10 femtoseconds to about 10 picoseconds while exposing said substrate surface to any of said dopant and a compound having said dopant as a constituent.

### Claim 2 (depends on 1)

The method of claim 1, wherein said incorporating step results in formation of a plurality of light-trapping surface textures in a top surface of said surface layer.

### Claim 3 (depends on 2)

The method of claim 2, wherein said optically annealing step substantially preserves said light-trapping surface textures.

### Claim 4 (depends on 2)

The method of claim 2, wherein said surface textures are characterized by a plurality of undulations having a peak-to-trough amplitude in a range of about 100 nanometers to about 100 micrometers.

### Claim 5 (depends on 3)

The method of claim 3, wherein said optically annealed doped surface layer exhibits an absorptance in a range of about 50% to 100% for said at least one sub-bandgap wavelength.

### Claim 6 (depends on 5)

The method of claim 5, wherein said thermal annealing step comprises exposing said doped surface layer to an elevated temperature in a range of about 200 deg. C. to about 1400 deg. C.

### Claim 7 (depends on 1)

The method of claim 1, wherein said optically annealed doped surface layer exhibits an absorptance for at least one sub-bandgap wavelength equal to or greater than about 50%.

### Claim 8 (depends on 1)

The method of claim 1, wherein said optically annealed doped surface layer has a thickness in a range of about 10 nm to about 1 micrometer.

### Claim 9 (depends on 8)

The method of claim 8, wherein said optically annealed doped surface layer has a thickness in a range of about 10 nm to about 200 nm.

### Claim 10 (depends on 1)

The method of claim 1, wherein said optical annealing step results in at least 50% recrystallization of said polyphase doped surface layer.

### Claim 11 (depends on 10)

The method of claim 10, wherein said semiconductor substrate comprises silicon and said dopant comprises a chalcogen.

### Claim 12 (depends on 1)

The method of claim 1, wherein said optical annealing step results in at least 80% recrystallization of said polyphase doped surface layer.

### Claim 13 (depends on 1)

The method of claim 1, wherein said dopant has a concentration greater than solid solubility limit of said dopant in said semiconductor.

### Claim 14 (depends on 1)

The method of claim 1, wherein said dopant has a concentration in a range of about 0.01 to about 1.5 atom percent in said semiconductor surface layer.

### Claim 15 (depends on 1)

The method of claim 1, wherein said dopant is any of an electron-donating and a hole-donating species.

### Claim 16 (depends on 1)

The method of claim 1, further comprising the step of thermally annealing said doped surface layer prior to said optical annealing step.

### Claim 17 (depends on 1)

The method of claim 1, wherein said optical annealing laser pulses have a central wavelength in a range of about 195 nm to about 1200 nm.

### Claim 18 (depends on 17)

The method of claim 17, wherein said dopant comprises a chalcogen.

### Claim 19 (depends on 17)

The method of claim 17, wherein said step of incorporating at least one dopant in said substrate comprises bringing a substrate surface into contact with a gas containing any of said dopant and a compound having said dopant as a constituent.

### Claim 20 (depends on 17)

The method of claim 17, wherein said step of incorporating at least one dopant in said substrate comprises applying a film containing any of said dopant and a compound having said dopant as a constituent to a surface of said substrate.

### Claim 21 (depends on 17)

The method of claim 17, wherein said optical annealing laser pulses have a central wavelength in a range of about 195 nm to about 355 nm.

### Claim 22 (depends on 1)

The method of claim 1, wherein said optical annealing laser pulses have a fluence in a range of about 0.1 to about 2.5 J/cm2.

### Claim 23 (depends on 1)

The method of claim 1, wherein said optically annealed doped surface layer forms a diode junction with underlying bulk substrate.

### Claim 24 (depends on 1)

The method of claim 1, wherein said substrate is any of silicon, germanium, silicon carbide, and gallium arsenide.

### Claim 25

A method of processing a semiconductor substrate, comprising:
incorporating at least one dopant in a semiconductor substrate so as to generate a doped polyphase surface layer by irradiating a surface of the semiconductor substrate with one or more laser pulses having a pulsewidth in a range of about 10 femtoseconds to about 1 picosecond,
optically annealing said surface layer via exposure to a plurality of laser pulses having a pulsewidth in a range of about 1 nanosecond to about 50 nanoseconds so as to enhance crystallinity of said doped surface layer,
wherein said optical annealing laser pulses have a central wavelength in a range of about 195 nm to about 355 nm.

### Claim 26 (depends on 25)

The method of claim 25, wherein said semiconductor substrate is any of silicon, germanium, silicon carbide, and gallium arsenide.

### Claim 27 (depends on 25)

The method of claim 25, wherein said optically annealed doped surface layer forms a diode junction with underlying bulk substrate.