# US 10,121,663 B2 · Semiconductor device and method for producing same

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- Number: US 10,121,663 B2
- Document ID: US10121663B2
- Status: Granted
- Kind: B2
- Application number: 15/320,799
- Filed: 2015-03-26
- Published: 2017-06-08
- Granted: 2018-11-06
- Earliest claimed: 2014-06-26
- Assignees: Denso Corporation
- Applicants: Denso Corporation
- Inventors: Yoshinori Tsuchiya; Hiroyuki Tarumi; Shinichi Hoshi; Masaki Matsui; Kenji Itoh; Tetsuo Narita; Tetsu Kachi
- Web page: https://patentgrep.com/patent/US10121663B2

## CPC

- H10P 32/12: between a solid phase and a gaseous phase
- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 30/475: {having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs}
- H10D 30/4755: {having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs}
- H10D 30/67: Thin-film transistors [TFT] {(Stacked nanowire, nanosheet or nanoribbon FETs H10D30/501)}
- H10D 62/299: {having lateral doping variations (IGFETs having lightly doped source or drain extensions H10D30/601)}
- H10D 62/405: {Orientations of crystalline planes}
- H10D 62/824: comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 64/01358: {the insulator being formed after the semiconductor body, the semiconductor being a Group III-V material}
- H10D 64/513: {within recesses in the substrate, e.g. trench gates, groove gates or buried gates}
- H10P 14/20: of semiconductor materials
- H10P 32/174: {being Group III-V material}
- H10D 64/256: {for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673)}
- H10D 64/691: {comprising metallic compounds, e.g. metal oxides or metal silicates (insulators comprising nitrogen H10D64/693)}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A semiconductor device includes a GaN device provided with: a substrate made of a semi-insulating material or a semiconductor; a channel-forming layer including a GaN layer arranged on the substrate; a gate structure in which a gate-insulating film in contact with the GaN layer is arranged on the channel-forming layer, the gate structure having a gate electrode arranged across the gate-insulating film; and a source electrode and a drain electrode that are arranged on the channel-forming layer and on opposite sides interposing the gate structure. The donor element concentration at the interface between the gate-insulating film and the GaN layer and at the lattice position on the GaN layer side with respect to the interface is set to be less than or equal to 5.0×1017 cm−3.

## Claims

### Claim 1

A method for producing a semiconductor comprising a GaN device including:
a substrate made of a semi-insulating material or a semiconductor;
a channel forming layer including a GaN layer arranged on the substrate;
a gate structure having a gate insulating film in contact with the GaN layer and arranged on the channel forming layer, and a gate electrode arranged via the gate insulating film; and
a source electrode and a drain electrode that are arranged on opposite sides to interpose the gate structure, on the channel forming layer, the method comprising:
forming the channel forming layer that includes the GaN layer on the substrate;
forming the gate insulating film that is in contact with the GaN layer on the channel forming layer; and
removing donor elements present in a portion of the GaN layer that is in contact with the gate insulating film after forming the channel forming layer and before forming the gate insulating film,
wherein the gate insulating film is formed without being exposed to an atmosphere containing the donor elements after removing the donor elements.

### Claim 2 (depends on 1)

The method for producing the semiconductor device according to claim 1, further comprising:
forming a mask that opens a planned formation position for the gate structure on the channel forming layer, to form a recess-shaped section, in which the GaN layer is exposed by etching using the mask,
wherein the donor elements are removed after forming the recess-shaped section.

### Claim 3 (depends on 1)

The method for producing the semiconductor device according to claim 1,
wherein an annealing process is carried out in removing the donor elements by using any of an F-type gas, a Cl2-type gas, an H2 gas, and an HCl gas.