# US 10,121,660 B2 · Method for fabricating semiconductor device

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- Number: US 10,121,660 B2
- Document ID: US10121660B2
- Status: Granted
- Kind: B2
- Application number: 15/428,365
- Filed: 2017-02-09
- Published: 2018-02-22
- Granted: 2018-11-06
- Earliest claimed: 2016-08-18
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: So Young Lee; Hyun Su Kim; Jong Won Hong
- Web page: https://patentgrep.com/patent/US10121660B2

## CPC

- H10P 76/405: {characterised by their composition, e.g. multilayer masks}
- H10P 50/283: {by chemical means}
- H10P 50/692: {characterised by their composition, e.g. multilayer masks or materials}
- H10P 50/693: {characterised by their size, orientation, disposition, behaviour or shape, in horizontal or vertical plane}
- H10P 50/71: {using masks for conductive or resistive materials}
- H10P 76/2041: {Photolithographic processes}
- H10P 76/408: {characterised by their sizes, orientations, dispositions, behaviours or shapes}
- H10P 76/4085: {characterised by the processes involved to create the masks}
- H10W 20/038: {covering conductive structures (H10W20/037 takes precedence)}
- H10W 20/057: {by selectively depositing, e.g. by using selective CVD or plating}
- H10W 20/063: {by forming conductive members before forming protective insulating material}
- H10W 20/0633: {using subtractive patterning of the conductive members}
- H10W 20/067: {by modifying the pattern of conductive parts}
- H10W 20/084: {for dual-damascene structures}
- H10W 20/42: Vias, e.g. via plugs
- H10W 20/425: {Barrier, adhesion or liner layers}
- H10W 20/435: {Cross-sectional shapes or dispositions of interconnections}
- H10W 20/47: comprising two or more dielectric layers having different properties, e.g. different dielectric constants
- H10W 46/00: Marks applied to devices, e.g. for alignment or identification
- H10W 46/301: {for alignment}
- H10W 46/501: {for use before dicing}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method of fabricating a semiconductor device includes forming a metal film including Cu on a substrate, forming a protective film on the metal film, forming a hard mask including TaOx, where x is 2.0 to 2.5, on the protective film, forming a hard mask pattern by patterning the hard mask, and forming a metal wiring by patterning the metal film, using the hard mask pattern as an etching mask.

## Claims

### Claim 1

A method of fabricating a semiconductor device, the method comprising:
forming a metal film including Cu on a substrate;
forming a protective film on the metal film;
forming a hard mask on the protective film, the hard mask including TaOx, where x is 2.0 to 2.5, and a ratio of a thickness of the hard mask to a thickness of the metal film is 1.0 or more, wherein forming the hard mask includes forming the hard mask at an alignment thickness T or less, the alignment thickness T being expressed by the following formula:
T
=
λ
2
⁢
π
⁢
⁢
k
<
Formula
>
where symbol λ is a wavelength of the light source, and symbol k is an extinction coefficient of the hard mask;
forming a hard mask pattern by patterning the hard mask; and
forming a metal wiring by patterning the metal film, using the hard mask pattern as an etching mask.

### Claim 2 (depends on 1)

The method as claimed in claim 1, wherein:
the metal film is patterned by sputter etching the metal film.

### Claim 3 (depends on 2)

The method as claimed in claim 2, wherein:
the hard mask includes TaOx, where x is 2.5, and
the ratio of the thickness of the hard mask to the thickness of the metal film is 1.1 or more.

### Claim 4 (depends on 1)

The method as claimed in claim 1, further comprising:
forming an alignment key including a same metal as the metal film below the metal film, wherein the forming the hard mask pattern includes:
forming a photomask on the hard mask,
forming a photomask pattern by exposing and developing the photomask, and detecting the alignment key using a light source having a wavelength of 500 nm to 700 nm before the exposing and developing,
etching the hard mask using the photomask pattern as an etching mask, and
removing the photomask pattern.

### Claim 5

A method of fabricating a semiconductor device, the method comprising:
forming a first interlayer insulating film and a first wiring embedded in the first interlayer insulating film, on a substrate;
forming a metal film on the first interlayer insulating film and the first wiring;
forming a first protective film on the metal film;
forming a hard mask including at least one of TaOx, where, x is 2.0 to 2.5, tungsten oxide, cobalt oxide, nickel oxide, platinum oxide, aluminum oxide, and titanium oxide on the first protective film;
forming a hard mask pattern by patterning the hard mask, and the hard mask pattern being aligned to overlap the first wiring by using a light source having a wavelength of 500 nm to 700 nm; and
forming a second wiring electrically coupled to the first wiring, by patterning the metal film using the hard mask pattern as an etching mask.

### Claim 6 (depends on 5)

The method as claimed in claim 5, wherein:
the metal film includes Cu,
patterning the metal film includes sputter etching the metal film, and
forming the hard mask includes forming the hard mask at an alignment thickness T or less, the alignment thickness T being expressed by the following formula:
T
=
λ
2
⁢
π
⁢
⁢
k
,
<
Formula
>
where symbol λ is a wavelength of the light source, and symbol k is an extinction coefficient of the hard mask.

### Claim 7 (depends on 6)

The method as claimed in claim 6, wherein:
the hard mask includes TaOx, where x is 2.5, and
the ratio of the thickness of the hard mask to the thickness of the metal film is 1.1 or more.

### Claim 8 (depends on 5)

The method as claimed in claim 5, further comprising forming a alignment key that is embedded in the first interlayer insulating film, and includes a same metal as the metal film,
wherein forming the hard mask pattern includes aligning the hard mask pattern to overlap the first wiring by detecting the alignment key using the light source.

### Claim 9 (depends on 8)

The method as claimed in claim 8, wherein the hard mask pattern extends in a same direction as the first wiring.

### Claim 10 (depends on 8)

The method as claimed in claim 8, wherein the hard mask pattern extends in a direction that intersects the first wiring.

### Claim 11 (depends on 8)

The method as claimed in claim 8, wherein the metal film and the alignment key include at least one of Cu, Pt, Co, and Ni.

### Claim 12 (depends on 5)

The method as claimed in claim 5, further comprising:
forming a second protective film on the first interlayer insulating film and the first wiring before forming the metal film;
forming a second interlayer insulating film on the second protective film;
forming a recess that at least partially exposes an upper surface of the first wiring by etching the second protective film and the second interlayer insulating film; and
forming a via by filling the recess.

### Claim 13 (depends on 12)

The method as claimed in claim 12, wherein the via is formed simultaneously with forming the metal film.

### Claim 14 (depends on 12)

The method as claimed in claim 12, wherein the metal film and the via include at least one of Cu, Pt, Co, and Ni.

### Claim 15

A method of fabricating a semiconductor device, the method comprising:
providing a substrate having an alignment key including a metal formed therein;
forming a metal film on the substrate and covering the alignment key, the metal film including a same metal as the alignment key;
forming a protective film on the metal film;
forming a hard mask on the protective film such that a ratio of a thickness of the hard mask to a thickness of the metal film is 1.0 or more, the hard mask including at least one of tantalum oxide, tungsten oxide, cobalt oxide, nickel oxide, platinum oxide, aluminum oxide, and titanium oxide, wherein a content of oxygen in the at least one of tantalum oxide, tungsten oxide, cobalt oxide, nickel oxide, platinum oxide, aluminum oxide, and titanium oxide is selected to provide an extinction coefficient value (k) of the hard mask such that the alignment key is detectable with a light source having a wavelength of 500 nm to 700 nm and such that a density ratio (d) of the hard mask with respect to the metal of the metal film is 1 or greater;
forming a photomask on the hard mask, detecting the alignment key using the light source having the wavelength of 500 nm to 700 nm, and patterning the photomask based on a detected position of the alignment key to form a photomask pattern;
etching the hard mask using the photomask pattern as an etching mask to form a hard mask pattern; and
patterning the metal film, using the hard mask pattern as an etching mask.

### Claim 16 (depends on 15)

The method as claimed in claim 15, wherein the metal of the metal film and alignment key includes copper (Cu).

### Claim 17 (depends on 15)

The method as claimed in claim 15, further including:
removing the photomask pattern after etching the hard mask and before patterning the metal film, and
after patterning the metal film, removing hard mask pattern debris generated in patterning the metal film.

### Claim 18 (depends on 15)

The method as claimed in claim 15, wherein forming the hard mask includes forming the hard mask at an alignment thickness T or less, the alignment thickness T being expressed by the following formula:
T
=
λ
2
⁢
π
⁢
⁢
k
,
<
Formula
>
where symbol λ is a wavelength of the light source, and symbol k is an extinction coefficient of the hard mask.

### Claim 19 (depends on 15)

The method as claimed in claim 15, wherein the hard mask includes TaOx, where x is 2.0 to 2.5.