# US 10,121,549 B2 · Semiconductor memory device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,121,549 B2 - Document ID: US10121549B2 - Status: Granted - Kind: B2 - Application number: 15/442,684 - Filed: 2017-02-26 - Published: 2018-02-22 - Granted: 2018-11-06 - Earliest claimed: 2016-08-19 - Assignees: Toshiba Memory Corporation - Applicants: Toshiba Memory Corporation - Inventors: Kosuke Yanagidaira - Web page: https://patentgrep.com/patent/US10121549B2 ## CPC - G11C 16/26: Sensing or reading circuits; Data output circuits - G11C 7/04: with means for avoiding disturbances due to temperature effects - G11C 16/10: Programming or data input circuits - G11C 29/025: {in signal lines} - G11C 29/028: {with adaption or trimming of parameters} - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A semiconductor memory device includes a first circuit configured to process data received from and transmitted to an external controller, a second circuit configured to execute calibration on the first circuit, and a control circuit configured to control the second circuit to execute the calibration on the first circuit in response to a calibration command received from the external controller. In response to a first calibration command, the control circuit controls the second circuit to execute the calibration on the first circuit. In response to a second calibration command that is received after the first calibration command, the control circuit controls the second circuit to execute the calibration on the first circuit if a first condition is met and to not execute the calibration on the first circuit if the first condition is not met. ## Claims ### Claim 1 A semiconductor memory device comprising: a first circuit configured to process data received from and transmitted to an external controller; a second circuit configured to execute calibration on the first circuit; and a control circuit configured to control the second circuit to execute the calibration on the first circuit in response to a calibration command received from the external controller, wherein in response to a first calibration command, the control circuit controls the second circuit to execute the calibration on the first circuit, and in response to a second calibration command that is received after the first calibration command, the control circuit controls the second circuit to execute the calibration on the first circuit if a first condition is met and to not execute the calibration on the first circuit if the first condition is not met, and a command sequence for the first calibration command received from the controller and a command sequence for the second calibration command received from the controller are different. ### Claim 2 (depends on 1) The device according to claim 1, wherein the first condition is met when a change in a temperature of the first circuit exceeds a threshold. ### Claim 3 (depends on 2) The device according to claim 2, wherein the second circuit includes a temperature measurement circuit that measures a first temperature of the first circuit at a time of the first calibration command and a second temperature of the first circuit at a time of the second calibration command, and the change is equal to a difference in the first and second measured temperatures. ### Claim 4 (depends on 2) The device according to claim 2, wherein the second circuit includes a temperature measurement circuit that measures a first temperature of the first circuit during a first core operation prior to the first calibration command and a second temperature of the first circuit during a second core operation after the first calibration command and prior to the second calibration command, and the change is equal to a difference in the first and second measured temperatures. ### Claim 5 (depends on 1) The device according to claim 1, wherein the first condition is met when a change in a voltage applied to the first circuit exceeds a threshold. ### Claim 6 (depends on 5) The device according to claim 5, wherein the second circuit includes a voltage measurement circuit that measures a first voltage applied to the first circuit at a time of the first calibration command and a second voltage applied to the first circuit at a time of the second calibration command, and the change is equal to a difference in the first and second measured voltages. ### Claim 7 (depends on 5) The device according to claim 5, wherein the second circuit includes a voltage measurement circuit that measures a first voltage applied to the first circuit during a first core operation prior to the first calibration command and a second voltage applied to the first circuit during a second core operation after the first calibration command and prior to the second calibration command, and the change is equal to a difference in the first and second measured voltages. ### Claim 8 (depends on 1) The device according to claim 1, wherein the second circuit is configured to calibrate an impedance of the first circuit. ### Claim 9 A semiconductor memory device comprising: a first circuit configured to process data received from and transmitted to an external controller; a second circuit configured to execute calibration on the first circuit; and a control circuit configured to control the second circuit to execute the calibration on the first circuit in response to a calibration command received from the external controller, wherein in response to a first calibration command, the control circuit controls the second circuit to execute the calibration on the first circuit, and in response to a second calibration command that is received after the first calibration command, the control circuit controls the second circuit to execute the calibration on the first circuit if a first condition is met and to not execute the calibration on the first circuit if the first condition is not met, and a command sequence for the first calibration command received from the controller and a command sequence for the second calibration command received from the controller are the same. ### Claim 10 A method of managing calibrations executed on an input/output circuit of a semiconductor memory device that performs operations therein in response to commands received from a controller, said method comprising: executing a first calibration on the input/output circuit in response to a first calibration command received from the controller; in response to a second calibration command that is received after the first calibration command, determining if a first condition is met; and executing a second calibration on the input/output circuit if the first condition is met but not executing the second calibration on the input/output circuit if the first condition is not met, wherein a command sequence for the first calibration command received from the controller and a command sequence for the second calibration command received from the controller are different. ### Claim 11 (depends on 10) The method according to claim 10, wherein the first condition is met when a change in a temperature of the input/output circuit exceeds a threshold. ### Claim 12 (depends on 11) The method according to claim 11, further comprising: measuring a first temperature of the input/output circuit at a time of the first calibration command and a second temperature of the input/output circuit at a time of the second calibration command, wherein the change is equal to a difference in the first and second measured temperatures. ### Claim 13 (depends on 11) The method according to claim 11, further comprising: measuring a first temperature of the first circuit during a first core operation that is executed prior to receipt of the first calibration command and a second temperature of the first circuit during a second core operation executed after receipt of the first calibration command and prior to receipt of the second calibration command, and the change is equal to a difference in the first and second measured temperatures. ### Claim 14 (depends on 10) The method according to claim 10, wherein the first condition is met when a change in a voltage applied to the first circuit exceeds a threshold. ### Claim 15 (depends on 14) The method according to claim 14, further comprising: measuring a first voltage applied to the first circuit at a time of the first calibration command and a second voltage applied to the first circuit at a time of the second calibration command, wherein the change is equal to a difference in the first and second measured voltages. ### Claim 16 (depends on 14) The method according to claim 14, further comprising: measuring a first voltage applied to the first circuit during a first core operation executed prior to receipt of the first calibration command and a second voltage applied to the first circuit during a second core operation executed after receipt of the first calibration command and prior to receipt of the second calibration command, wherein the change is equal to a difference in the first and second measured voltages. ### Claim 17 (depends on 10) The method according to claim 10, wherein the calibrations are executed on the input/output circuit to calibrate an impedance of the input/output circuit. ### Claim 18 A method of managing calibrations executed on an input/output circuit of a semiconductor memory device that performs operations therein in response to commands received from a controller, said method comprising: executing a first calibration on the input/output circuit in response to a first calibration command received from the controller; in response to a second calibration command that is received after the first calibration command, determining if a first condition is met; and executing a second calibration on the input/output circuit if the first condition is met but not executing the second calibration on the input/output circuit if the first condition is not met, wherein a command sequence for the first calibration command received from the controller and a command sequence for the second calibration command received from the controller are the same.