# US 10,121,412 B2 · Display device and timing controller > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,121,412 B2 - Document ID: US10121412B2 - Status: Granted - Kind: B2 - Application number: 14/835,125 - Filed: 2015-08-25 - Published: 2016-03-03 - Granted: 2018-11-06 - Earliest claimed: 2014-09-03 - Assignees: LG Display Co., Ltd. - Applicants: LG Display Co., Ltd. - Inventors: Jinsol Choi - Web page: https://patentgrep.com/patent/US10121412B2 ## CPC - G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element - G09G 2320/043: Preventing or counteracting the effects of ageing - G09G 2330/08: Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract Disclosed is a display device and a timing controller that can check the status of a display driving related unit, take a proper countermeasure according to the check result, and prevent an abnormal operation of the display driving related unit or prevent a failure in driving, damage to a device, and screen abnormality that may happen according to the abnormal operation of the display driving related unit. ## Claims ### Claim 1 A display device comprising: a unit status check unit that outputs a status check command signal to a status check unit corresponding to a display driving related unit, receives a signal output from the status check unit as a feedback signal according to the status check command signal, and records a status bit value of the status check unit in a status register corresponding to the status check unit based on the feedback signal; a memory that stores the status bit value of the status register corresponding to the status check unit; and a controller that performs an abnormality response process step-by-step according to the number of times that the abnormal status bit value is continually recorded in the status register, wherein the controller performs a first step of the abnormality response process when the abnormal status bit value is first recorded in the status register, performs a second step of the abnormality response process when the abnormal status bit value is continually recorded in the status register more than two times and less than the number of times needed to confirm an abnormal status, and performs a third step of the abnormality response process when the abnormal status bit value is continually recorded in the status register more than the number of times needed to confirm an abnormal status, wherein the display driving related unit is one of a data driver integrated circuit, a gate driver integrated circuit, a power management integrated circuit and a gamma unit. ### Claim 2 (depends on 1) The display device of claim 1, wherein the unit status check unit determines whether an actual output value identified from the feedback signal falls within a predetermined normal output range, determines that the status check unit is in a normal status and records a normal status bit value in the status register when it is determined that the actual output value falls within the predetermined normal output range, and determines that the status check unit is in an abnormal status and records an abnormal status bit value in the status register when it is determined that the actual output value departs from the predetermined normal output range. ### Claim 3 (depends on 2) The display device of claim 2, wherein the unit status check unit finally confirms the normal status of the status check unit when the normal status bit value is continually recorded in the status register more than the number of times needed to confirm a normal status, and finally confirms the abnormal status of the status check unit when the abnormal status bit value is continually recorded in the status register more than the number of times needed to confirm an abnormal status. ### Claim 4 (depends on 3) The display device of claim 3, wherein the controller that controls the status check unit, the display device, or power according to the status bit value recorded in the status register. ### Claim 5 (depends on 1) The display device of claim 1, wherein the controller lowers the step of the abnormality response process when the normal status bit value is recorded after the abnormal status bit value is continually recorded in the status register more than one time and less than the number of times needed to confirm an abnormal status, and the controller stops all the steps of the abnormality response process and controls the status check unit to normally operate when the normal status bit value is continually recorded more than the number of times for confirming a normal status. ### Claim 6 (depends on 1) The display device of claim 1, further comprising: a first converter that converts the feedback signal fed back from the status check unit into a digital signal and inputs the converted digital signal to the unit status check unit when the status check unit is a unit that outputs an analog signal. ### Claim 7 (depends on 1) The display device of claim 1, further comprising: a second converter that converts the status check command signal output from the unit status check unit into an analog signal and inputs the converted analog signal to the status check unit when the status check unit is a unit that receives an input of an analog signal. ### Claim 8 (depends on 1) The display device of claim 1, wherein when the status check unit is a power management integrated circuit, the unit status check unit outputs an enable signal to the power management integrated circuit as the status check command signal, and receives a signal, as a feedback signal, which corresponds to the power that the power management integrated circuit outputs to a display panel, a data driver integrated circuit, or a gate driver integrated circuit. ### Claim 9 (depends on 1) The display device of claim 1, wherein when the status check unit is a driving programmable gamma unit, the unit status check unit outputs a driving programmable gamma setting value to the driving programmable gamma unit as the status check command signal, and receives a signal, as the feedback signal, which corresponds to a driving programmable gamma output value that the driving programmable gamma unit outputs. ### Claim 10 (depends on 1) The display device of claim 1, wherein when the status check unit is a sensing programmable gamma unit, the unit status check unit outputs a sensing programmable gamma setting value to the sensing programmable gamma unit as the status check command signal, and receives a signal, as the feedback signal, which corresponds to a sensing programmable gamma output value that the sensing programmable gamma unit outputs. ### Claim 11 (depends on 1) The display device of claim 1, wherein when the status check unit is an analog digital converter in a data driver integrated circuit, the unit status check unit outputs an analog voltage value to the analog digital converter as the status check command signal, and receives a signal, as the feedback signal, which corresponds to a digital value that the analog digital converter outputs. ### Claim 12 (depends on 1) The display device of claim 1, wherein when the status check unit is a digital analog converter in a data driver integrated circuit, the unit status check unit outputs a digital value to the digital analog converter as the status check command signal, and receives a signal, as the feedback signal, which corresponds to an analog voltage value that the digital analog converter outputs. ### Claim 13 A timing controller comprising: a status register that corresponds to each of a plurality of status check units relevant to display driving related units; a unit status check unit that outputs a status check command signal to each of the plurality of status check units, receives a signal output from the corresponding status check unit as a feedback signal according to the status check command signal, and records a status bit value of the corresponding status check unit in a status register corresponding to the corresponding status check unit based on the feedback signal; and a controller that performs an abnormality response process step-by-step according to the number of times that the abnormal status bit value is continually recorded in the status register, wherein the controller performs a first step of the abnormality response process when the abnormal status bit value is first recorded in the status register, performs a second step of the abnormality response process when the abnormal status bit value is continually recorded in the status register more than two times and less than the number of times needed to confirm an abnormal status, and performs a third step of the abnormality response process when the abnormal status bit value is continually recorded in the status register more than the number of times needed to confirm an abnormal status, wherein the display driving related unit is one of a data driver integrated circuit, a gate driver integrated circuit, a power management integrated circuit and a gamma unit. ### Claim 14 (depends on 13) The timing controller of claim 13, further comprising: a controller that controls the status check unit, a display device, or power according to the status bit value recorded in the status register. ### Claim 15 A display device comprising: a timing controller that determines the status of a display driving related unit based on an output signal of the display driving related unit and records a status bit value in a status register corresponding to the display driving related unit; a memory that stores the status register corresponding to the display driving related unit; and a controller that performs an abnormality response process step-by-step according to the number of times that the abnormal status bit value is continually recorded in the status register, wherein the controller performs a first step of the abnormality response process when the abnormal status bit value is first recorded in the status register, performs a second step of the abnormality response process when the abnormal status bit value is continually recorded in the status register more than two times and less than the number of times needed to confirm an abnormal status, and performs a third step of the abnormality response process when the abnormal status bit value is continually recorded in the status register more than the number of times needed to confirm an abnormal status, wherein the display driving related unit is one of a data driver integrated circuit, a gate driver integrated circuit, a power management integrated circuit and a gamma unit.