# US 10,121,013 B2 · XOR-based scrambler/descrambler for SSD communication protocols

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- Number: US 10,121,013 B2
- Document ID: US10121013B2
- Status: Granted
- Kind: B2
- Application number: 15/064,191
- Filed: 2016-03-08
- Published: 2016-11-10
- Granted: 2018-11-06
- Earliest claimed: 2015-05-07
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Chihjen Chang; Michael Bekerman; Ian Swarbrick; Craig Hanson
- Web page: https://patentgrep.com/patent/US10121013B2

## CPC

- G06F 21/606: {by securing the transmission between two devices or processes}
- G06F 12/14: Protection against unauthorised use of memory {or access to memory}
- G06F 12/1408: {by using cryptography (for digital transmission H04L9/00)}
- G06F 21/79: in semiconductor storage media, e.g. directly-addressable memories
- G06F 21/85: interconnection devices, e.g. bus-connected or in-line devices
- G09C 1/00: Apparatus or methods whereby a given sequence of signs, e.g. an intelligible text, is transformed into an unintelligible sequence of signs by transposing the signs or groups of signs or by replacing them by others according to a predetermined system (cryptographic typewriters G09C3/00)
- H04L 9/065: {Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3}
- G06F 2212/1052: Security improvement
- G06F 2212/202: Non-volatile memory
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G09C: CIPHERING OR DECIPHERING APPARATUS FOR CRYPTOGRAPHIC OR OTHER PURPOSES INVOLVING THE NEED FOR SECRECY
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

Example embodiments for descrambling and scrambling a memory channel include executing a training mode for the memory device to discover XOR vectors used by the host system to scramble data. The training mode inputs all zero training data to a scrambling algorithm for all memory locations of the memory device to generate scrambled training data that is transmitted over the memory channel to the memory device. The scrambled training data are equal to the XOR vectors corresponding to those memory locations. The scrambled training data is received over the memory channel by the memory device and stored as the XOR vectors for each corresponding memory location. During a functional mode, the scrambled data is received over the memory channel for a specified memory location and the XOR vector stored for the specified memory location is used to descramble the scrambled data prior to writing to the specified memory location.

## Claims

### Claim 1

A method for descrambling and scrambling data transmitted via a memory channel of a memory device coupled to a host system, the method, comprising:
executing a training mode for the memory device to discover XOR vectors used by the host system to scramble data by:
inputting all zero training data to a scrambling algorithm for all memory locations of the memory device to generate scrambled training data that is transmitted over the memory channel to the memory device, such that the scrambled training data are equal to the XOR vectors corresponding to those memory locations;
receiving the scrambled training data over the memory channel by the memory device and storing the scrambled training data as the XOR vectors for each of the corresponding memory locations; and
after the training mode and during a functional mode of the memory device, receiving, by the memory device, scrambled data over the memory channel for a specified memory location, and using an XOR vector of the XOR vectors stored for the specified memory location to descramble the scrambled data prior to writing to the specified memory location.

### Claim 2 (depends on 1)

The method of claim 1, further comprising:
when reading the data from the specified memory location during the functional mode, retrieving the data and using the XOR vector stored for the specified memory location to scramble the data prior to transmitting the scrambled data over the memory channel to the host system.

### Claim 3 (depends on 1)

The method of claim 1, wherein a storage device driver on the host system initiates the training mode.

### Claim 4 (depends on 1)

The method of claim 1, wherein during the training mode a storage controller on the memory device receives the scrambled training data and a descrambling and scrambling algorithm stores the XOR vectors.

### Claim 5 (depends on 4)

The method of claim 4, wherein the memory device includes a vector storage memory that stores the XOR vectors.

### Claim 6 (depends on 1)

The method of claim 1, wherein receiving the scrambled data during the functional mode further comprises:
retrieving, by a descrambling and scrambling algorithm on the memory device, the XOR vector for the specified memory location from a vector storage memory of the memory device and performing an exclusive-OR operation on the XOR vector and the scrambled data to generate descrambled data, which is then stored in the specified memory location.

### Claim 7 (depends on 1)

The method of claim 1, wherein the scrambled data received during the functional mode includes at least one of: Control/Descriptor data, Status data, User data, and Control data.

### Claim 8 (depends on 7)

The method of claim 7, wherein when the scrambled data includes the Control/Descriptor data, a descrambling and scrambling algorithm on the memory device stores the XOR vector for each corresponding control/descriptor memory location during the training mode.

### Claim 9 (depends on 8)

The method of claim 8, wherein when the descrambling and scrambling algorithm uses the XOR vectors to descramble the Control/Descriptor data during the functional mode.

### Claim 10 (depends on 7)

The method of claim 7, wherein when the scrambled data includes Status data, a descrambling and scrambling algorithm on the memory device stores the XOR vector for each corresponding status memory location during the training mode.

### Claim 11 (depends on 10)

The method of claim 10, wherein when the descrambling and scrambling algorithm uses the XOR vectors to scramble the Status data during the functional mode.

### Claim 12 (depends on 7)

The method of claim 7, wherein when the scrambled data includes the User data and Control data, a descrambling and scrambling algorithm on the memory device stores the XOR vector for each corresponding User data memory location during the training mode.

### Claim 13 (depends on 12)

The method of claim 12, wherein when the descrambling and scrambling algorithm uses the XOR vectors to scramble the User data and Control data during a read of the memory device during the functional mode; and for a write to the memory device during the functional mode, the descrambling algorithm descrambles the User data and the Control data prior to writing to the memory device.

### Claim 14 (depends on 7)

The method of claim 7, further comprising:
storing the XOR vectors in a vector storage memory on the memory device, wherein the vector storage memory is partitioned into different areas including one or more of: a Control/Descriptor data vector area, a Status data vector area, a User data vector area, and a Control data vector area, to store the XOR vectors for the corresponding type of data.

### Claim 15

A system for descrambling and scrambling data transmitted via a memory channel of a memory device coupled to a host system, comprising:
a storage device driver installed on the host system that executes a training mode for the memory device to discover XOR vectors used by the host system to scramble data by:
inputting all zero training data to a scrambling algorithm for all memory locations of the memory device to generate scrambled training data that is transmitted over the memory channel to the memory device, such that the scrambled training data are equal to the XOR vectors corresponding to those memory locations; and
a storage controller on the memory device configured to:
receive the scrambled training data over the memory channel and store the scrambled training data as the XOR vectors for each of the corresponding memory locations; and
after the training mode and during a functional mode of the memory device, receive scrambled data over the memory channel for a specified memory location, and use an XOR vector of the XOR vectors stored for the specified memory location to descramble the scrambled data prior to writing to the specified memory location.

### Claim 16 (depends on 15)

The system of claim 15, wherein when reading the data from the specified memory location during the functional mode, the memory device retrieves the data and uses the XOR vector stored for the specified memory location to scramble the data prior to transmitting the scrambled data over the memory channel to the host system.

### Claim 17 (depends on 15)

The system of claim 15, wherein during the training mode a storage controller on the memory device receives the scrambled training data and a descrambling algorithm stores the XOR vectors.

### Claim 18 (depends on 17)

The system of claim 17, wherein the memory device includes a vector storage memory that stores the XOR vectors.

### Claim 19 (depends on 15)

The system of claim 15, wherein while receiving scrambled data during functional mode, a descrambling and scrambling algorithm on the memory device retrieves the XOR vector for the specified memory location from a vector storage memory of the memory device and performs an exclusive-OR operation on the XOR vector and the scrambled data to generate descrambled data, which is then stored in the specified memory location.

### Claim 20 (depends on 15)

The system of claim 15, wherein the scrambled data received during functional mode includes at least one of: Control/Descriptor data, Status data, User data, and Control data.

### Claim 21 (depends on 20)

The system of claim 20, wherein when the scrambled data includes the Control/Descriptor data, a descrambling and scrambling algorithm on the memory device stores the XOR vector for each corresponding control/descriptor memory location during the training mode.

### Claim 22 (depends on 21)

The system of claim 21, wherein the descrambling and scrambling algorithm uses the XOR vectors to descramble the Control/Descriptor data during the functional mode.

### Claim 23 (depends on 20)

The system of claim 20, wherein when the scrambled data includes Status data, a descrambling and scrambling algorithm on the memory device stores the XOR vector for each corresponding status memory location during the training mode.

### Claim 24 (depends on 23)

The system of claim 23, wherein the descrambling and scrambling algorithm uses the XOR vectors to scramble the Status data during the functional mode.

### Claim 25 (depends on 20)

The system of claim 20, wherein when the scrambled data includes the User data and Control data, a descrambling and scrambling algorithm on the memory device stores the XOR vector for each corresponding User data memory location during the training mode.

### Claim 26 (depends on 25)

The system of claim 25, wherein the descrambling and scrambling algorithm uses the XOR vectors to scramble the User data and Control data during a read of the memory device during the functional mode; and for a write to the memory device during the functional mode, the descrambling and scrambling algorithm descrambles the User data and the Control data prior to writing to the memory device.

### Claim 27 (depends on 20)

The system of claim 20, further comprising: storing the XOR vectors in a vector storage memory on the memory device, wherein the vector storage memory is partitioned into different areas including one or more of: a Control/Descriptor data vector area, a Status data vector area, a User data vector area, and a Control data vector area, to store the XOR vectors for the corresponding type of data.

### Claim 28

An executable software product stored on a non-transitory computer-readable storage medium containing program instructions for descrambling and scrambling a data transmitted on a memory channel of a memory device coupled to a host system, the program instructions for:
executing a training mode for the memory device to discover XOR vectors used by the host system to scramble data by:
inputting all zero training data to a scrambling algorithm for all memory locations of the memory device to generate scrambled training data that is transmitted over the memory channel to the memory device, such that the scrambled training data are equal to the XOR vectors corresponding to those memory locations;
receiving the scrambled training data over the memory channel by the memory device and storing the scrambled training data as the XOR vectors for each of the corresponding memory locations; and
after the training mode and during a functional mode of the memory device, receiving, by the memory device, scrambled data over the memory channel for a specified memory location, and using an XOR vector of the XOR vectors stored for the specified memory location to descramble the scrambled data prior to writing to the specified memory location.