# US 10,120,968 B1 · System and method for hierarchical library searching > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,120,968 B1 - Document ID: US10120968B1 - Status: Granted - Kind: B1 - Application number: 14/958,179 - Filed: 2015-12-03 - Granted: 2018-11-06 - Earliest claimed: 2015-12-03 - Assignees: Cadence Design Systems, Inc. - Applicants: Cadence Design Systems, Inc. - Inventors: Dan Richard Kaiser; Jonathan Lee DeKock; Steven Guy Esposito - Web page: https://patentgrep.com/patent/US10120968B1 ## CPC - G06F 30/30: Circuit design - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract The present disclosure relates to defining and processing hardware description language (HDL) groups. Embodiments may include mapping, using a processor, a set of tool-specific objects into a group graph with one or more groups. Embodiments may also include generating a search order associated with each group. The search order associated with each group may be based upon the hierarchical design configuration of the group graph. Embodiments may further include identifying undefined references from within a first group within the group graph and binding defined references from within the first group to electronic circuit design components. Embodiments may include identifying the undefined references from within a second group within the group graph. The second group may be selected based upon the undefined references and the search order associated with the first group. ## Claims ### Claim 1 A computer-implemented method for defining and processing hardware description language (HDL) groups for use with an electronic circuit design to be fabricated comprising: mapping, using a processor, one or more tool-specific objects into a group graph having one or more groups arranged as nodes in the group graph, wherein each of the one or more groups includes at least one sub-group, library information, and HDL design information, wherein the group graph is configured as a data structure; generating a search order associated with each of the one or more groups within the group graph, wherein the search order associated with each of the one or more groups is based upon, at least in part, a hierarchical design configuration of the group graph and wherein the search order is determined, based upon, at least in part, a command line structure; identifying one or more undefined references from within a first group of the one or more groups within the group graph; binding one or more defined references from within the first group to one or more electronic circuit design components; and identifying the one or more undefined references from within a second group of the one or more groups within the group graph, wherein the second group is selected based upon, at least in part, the one or more undefined references and the search order associated with the first group of the one or more groups. ### Claim 2 (depends on 1) The computer-implemented method of claim 1, further comprising: acquiring the second group from the one or more groups of the group graph at least partially concurrently with the identification of the one or more undefined references. ### Claim 3 (depends on 1) The computer-implemented method of claim 1, further comprising: generating a library catalog with information acquired during the identification of the one or more undefined references from within the first group and the identification of the one or more undefined references from within the second group. ### Claim 4 (depends on 3) The computer-implemented method of claim 3, further comprising: identifying the one or more undefined references from within a subset of the one or more groups based upon, at least in part, the information within the library catalog. ### Claim 5 (depends on 1) The computer-implemented method of claim 1, further comprising: binding a second set of defined references from within the second group to one or more electronic circuit design components, wherein the second set of defined references includes one or more of the undefined references identified from within the second group. ### Claim 6 (depends on 1) The computer-implemented method of claim 1, further comprising: iteratively acquiring each of the one or more groups partially concurrently with the identification of one or more undefined references from the one or more references. ### Claim 7 (depends on 6) The computer-implemented method of claim 6, further comprising: iteratively processing the one or more groups until at least one of: each of the one or more undefined references is defined; and each of the one or more groups is used to identify the one or more undefined references and the one or more undefined references remains undefined. ### Claim 8 (depends on 1) The computer-implemented method of claim 1, wherein the search order associated with each of the one or more groups includes one or more search rules that can be altered based upon, at least in part, the setting of one or more parameters and one or more meta-rule directives. ### Claim 9 (depends on 1) The computer-implemented method of claim 1, wherein the one or more groups include at least one of command lines, tool options, file types, filters, an HDL file, an HDL library, an HDL command line, and an HDL include file. ### Claim 10 A system for defining and processing hardware description language (HDL) groups for use with an electronic circuit design to be fabricated comprising: a computing device having at least one processor configured to map one or more tool-specific objects into a group graph having one or more groups arranged as nodes in the group graph, wherein the group graph is configured as a data structure, wherein each of the one or more groups includes at least one sub-group, library information, and HDL design information, generate a search order associated with each of the one or more groups within the group graph and wherein the search order is determined, based upon, at least in part, a command line structure, wherein the search order associated with each of the one or more groups is based upon, at least in part, a hierarchical design configuration of the group graph, identify one or more undefined references from within a first group of the one or more groups within the group graph, bind one or more defined references from within the first group to one or more electronic circuit design components, and identify the one or more undefined references from within a second group of the one or more groups within the group graph, wherein the second group is selected based upon, at least in part, the one or more undefined references and the search order associated with the first group of the one or more groups. ### Claim 11 (depends on 10) The system of claim 10, wherein the at least one processor is further configured to acquire the second group from the one or more groups of the group graph at least partially concurrently with the identification of the one or more undefined references. ### Claim 12 (depends on 10) The system of claim 10, wherein the at least one processor is further configured to generate a library catalog with information acquired during the identification of the one or more undefined references from within the first group and the identification of the one or more undefined references from within the second group. ### Claim 13 (depends on 12) The system of claim 12, wherein the at least one processor is further configured to identify the one or more references from within a subset of the one or more groups based upon, at least in part, the information within the library catalog. ### Claim 14 (depends on 10) The system of claim 10, wherein the at least one processor is further configured to bind a second set of defined references from within the second group to one or more electronic circuit design components, wherein the second set of defined references includes one or more of the undefined references identified from within the second group. ### Claim 15 (depends on 10) The system of claim 10, wherein the at least one processor is further configured to iteratively acquire each of the one or more groups partially concurrently with the identification of one or more undefined references from the one or more references. ### Claim 16 (depends on 10) The system of claim 10, wherein the at least one processor is further configured to iteratively process the one or more groups until at least one of: each of the one or more undefined references is defined; and each of the one or more groups is used to identify the one or more undefined references and the one or more undefined references remains undefined. ### Claim 17 (depends on 10) The system of claim 10, wherein the one or more groups include at least one of command lines, tool options, file types, filters, an HDL file, an HDL library, an HDL command line, and an HDL include file. ### Claim 18 A non-transitory computer-readable storage medium for use with an electronic circuit design to be fabricated, the computer-readable storage medium having stored thereon instructions that when executed by a machine result in the following operations: mapping, using a processor, one or more tool-specific objects into a group graph having one or more groups arranged as nodes in the group graph, wherein each of the one or more groups includes at least one sub-group, library information, and HDL design information, wherein the group graph is configured as a data structure; generating a search order associated with each of the one or more groups within the group graph, wherein the search order associated with each of the one or more groups is based upon, at least in part, a hierarchical design configuration of the group graph and wherein the search order is determined, based upon, at least in part, a command line structure; identifying one or more undefined references from within a first group of the one or more groups within the group graph; binding one or more defined references from within the first group to one or more electronic circuit design components; and identifying the one or more undefined references from within a second group of the one or more groups within the group graph, wherein the second group is selected based upon, at least in part, the one or more undefined references and the search order associated with the first group of the one or more groups. ### Claim 19 (depends on 18) The computer-readable storage medium of claim 18, wherein operations further comprise: acquiring the second group from the one or more groups of the group graph at least partially concurrently with the identification of the one or more undefined references. ### Claim 20 (depends on 18) The computer-readable storage medium of claim 18, wherein operations further comprise: generating a library catalog with information acquired during the identification of the one or more undefined references from within the first group and the identification of the one or more undefined references from within the second group.