# US 10,120,642 B2 · Software-based wireless coordination of audio playback

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- Number: US 10,120,642 B2
- Document ID: US10120642B2
- Status: Granted
- Kind: B2
- Application number: 15/678,087
- Filed: 2017-08-15
- Published: 2018-06-14
- Granted: 2018-11-06
- Earliest claimed: 2016-12-13
- Applicants: EVA Automation, Inc.
- Inventors: Leo Lay; Adrian Harold Chadd; Haisong Wang; Shiwei Zhao; Li Li; Gaylord Yu
- Web page: https://patentgrep.com/patent/US10120642B2

## CPC

- G06F 3/165: {Management of the audio stream, e.g. setting of volume, audio stream path}
- H04H 60/80: characterised by transmission among terminal devices
- H04J 3/0632: {Synchronisation of packets and cells, e.g. transmission of voice via a packet network, circuit emulation service [CES] (queuing arrangements in packet switching elements H04L49/90; synchronising systems for the synchronous transmission of a pulse code modulated video signal with one or more other pulse code modulated signals H04N7/56)}
- H04J 3/0661: {using timestamps}
- H04L 7/0012: {by comparing receiver clock with transmitter clock}
- H04L 7/0016: {correction of synchronization errors}
- H04L 7/033: using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L 7/0331: {with a digital phase-locked loop [PLL] processing binary samples, e.g. add/subtract logic for correction of receiver clock (H04L7/0337 takes precedence)}
- H04L 65/60: Network streaming of media packets
- H04L 65/61: for supporting one-way streaming services, e.g. Internet radio
- H04L 65/65: Network streaming protocols, e.g. real-time transport protocol [RTP] or real-time control protocol [RTCP]
- H04L 65/80: Responding to QoS
- H04M 1/72442: for playing music files
- H04N 21/233: Processing of audio elementary streams {(monitoring, identification or recognition of audio in broadcast systems H04H60/58)}
- H04N 21/4305: {Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets (arrangements for synchronising receiver with transmitter by comparing receiver clock with transmitter clock H04L7/0012; arrangements for synchronising receiver with transmitter wherein the receiver takes measures against momentary loss of synchronisation H04L7/0083)}
- H04N 21/8113: {comprising music, e.g. song in MP3 format}
- H04R 3/12: for distributing signals to two or more loudspeakers {(specially adapted for hearing aids H04R25/407)}
- H04R 27/00: Public address systems (circuits for preventing acoustic reaction H04R3/02; circuits for distributing signals to loudspeakers H04R3/12; {monitoring or testing arrangements for public address systems H04R29/007}; amplifiers H03F)
- H04W 56/0015: {one node acting as a reference for the others}
- H04W 56/005: {compensating for timing error by adjustment in the receiver}
- H04R 2227/005: Audio distribution systems for home, i.e. multi-room use
- H04R 2420/07: Applications of wireless loudspeakers or wireless microphones
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04H: BROADCAST COMMUNICATION (multiplex communication H04J; pictorial communication aspects of broadcast systems H04N)
- H04J: MULTIPLEX COMMUNICATION (transmission in general H04B; peculiar to transmission of digital information H04L5/00; systems for the simultaneous or sequential transmission of more than one television signal H04N7/08; in exchanges H04Q11/00; stereophonic systems H04S)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- H04M: TELEPHONIC COMMUNICATION (circuits for controlling other apparatus via a telephone cable and not involving telephone switching apparatus G08)
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04R: LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS (producing sounds with frequency not determined by supply frequency G10K)
- H04W: WIRELESS COMMUNICATION NETWORKS (broadcast communication H04H; communication systems using wireless links for non-selective communication, e.g. wireless extensions H04M1/72)

## Abstract

A processor in an electronic device may coordinate an interface clock in the electronic device with a second interface clock in a second electronic device based on time-coordination information received in packets from the second electronic device. Then, the processor captures timing information associated with the interface clock provided by an interface clock circuit to increase a resolution of a system clock. Moreover, the processor may track, using the timing information, relative drift as a function of time between the system clock and the interface clock, and may determine, based on the relative drift, an estimated time offset between the interface clock and the system clock at the future time. Next, the processor modifies a future time when the electronic device is to perform the playback operation based on the estimated time offset to determine a corrected future time, and may perform the playback operation at the corrected future time.

## Claims

### Claim 1

An electronic device, comprising:
a system clock circuit configured to provide a system clock in the electronic device;
a processor, coupled to the system clock, configured to execute software;
one or more antennas;
an interface clock circuit that is configured to provide an interface clock; and
an interface circuit communicatively coupled to the one or more antennas and the processor, wherein the interface circuit is configured to:
receive, from the one or more antennas, packets associated with a second electronic device, wherein a given packet includes time-coordination information based on a second interface clock in the second electronic device;
coordinate the interface clock with a second interface clock based on the time-coordination information; and
receive, from the one or more antennas, information associated with the second electronic device specifying a future time when the electronic device is to perform a playback operation; and
wherein the processor is configured to:
capture timing information associated with the interface clock or a reference clock that is used by the interface clock circuit to generate the interface clock to increase a resolution of the system clock, wherein the interface clock has a higher frequency than the system clock;
track, using the timing information, relative drift as a function of time between the system clock and the interface clock;
determine, based on the relative drift, an estimated time offset between the interface clock and the system clock at the future time;
modify the future time based on the estimated time offset to determine a corrected future time; and
perform the playback operation at the corrected future time.

### Claim 2 (depends on 1)

The electronic device of claim 1, wherein, prior to performing the playback operation, the processor is further configured to:
disable interrupts in the electronic device; and
occupy at least a portion of a software stack by executing a loop to reduce a latency associated with performing the playback operation.

### Claim 3 (depends on 1)

The electronic device of claim 1, further comprising memory, coupled to the processor, configured to store a program module, wherein, when executed by the processor, the program module causes the electronic device to perform the capturing, the tracking, the determining, the modifying and the performing.

### Claim 4 (depends on 1)

The electronic device of claim 1, wherein capturing the timing information involves storing time values of the interface clock in a register or a counter.

### Claim 5 (depends on 1)

The electronic device of claim 1, wherein the electronic device further comprises an oscillator that is configured to provide the reference clock;
wherein the interface clock circuit is coupled to the oscillator and provides the interface clock based on the reference clock; and
wherein the timing information is captured from the reference clock.

### Claim 6 (depends on 1)

The electronic device of claim 1, wherein the interface circuit is configured to receive, from the one or more antennas, additional packets that include audio data in payloads;
wherein the electronic device is configured to store the audio data in a queue; and
wherein the playback operation includes outputting the audio data from the queue.

### Claim 7 (depends on 1)

The electronic device of claim 1, wherein the capturing, the tracking, the determining and the modifying coordinate the playback operation within a predefined value of the clock domain of the second interface clock.

### Claim 8 (depends on 1)

The electronic device of claim 1, wherein the second electronic device is a master and the electronic device is a slave.

### Claim 9

A non-transitory computer-readable storage medium for use with an electronic device, the computer-readable storage medium storing a program module that, when executed by the electronic device, coordinates a playback operation by causing the electronic device to perform one or more operations comprising:
capturing timing information associated with an interface clock provided by an interface clock circuit in the electronic device or a reference clock that is used by the interface clock circuit to generate the interface clock to increase a resolution of the system clock, wherein the interface clock has a higher frequency than the system clock;
tracking, using the timing information, relative drift as a function of time between the system clock and the interface clock, wherein the interface clock is coordinated with a second interface clock in a second electronic device based on time-coordination information received, from an interface circuit in the electronic device, in packets associated with the second electronic device;
determining, based on the relative drift, an estimated time offset between the interface clock and the system clock at a future time, which was received from the interface circuit, when the electronic device is to perform the playback operation;
modifying the future time based on the estimated time offset to determine a corrected future time; and
performing the playback operation at the corrected future time.

### Claim 10 (depends on 9)

The computer-program product of claim 9, wherein, prior to performing the playback operation, the one or more operations comprise:
disabling interrupts in the electronic device; and
occupying at least a portion of a software stack by executing a loop to reduce a latency associated with performing the playback operation.

### Claim 11 (depends on 9)

The computer-program product of claim 9, wherein the capturing of the timing information involves storing time values of the interface clock in a register or a counter.

### Claim 12 (depends on 9)

The computer-program product of claim 9, wherein the one or more operations comprise:
receiving, from the interface circuit, additional packets that include audio data in payloads;
storing the audio data in a queue; and
wherein performing the playback operation involves outputting the audio data from the queue.

### Claim 13 (depends on 9)

The computer-program product of claim 9, wherein the capturing, the tracking, the determining and the modifying coordinate the playback operation within a predefined value of the clock domain of the second interface clock.

### Claim 14 (depends on 9)

The computer-program product of claim 9, wherein the second electronic device is a master and the electronic device is a slave.

### Claim 15

A method for coordinating a playback operation, comprising:
in a processor in an electronic device:
capturing timing information associated with an interface clock provided by an interface clock circuit in the electronic device or a reference clock that is used by the interface clock circuit to generate the interface clock to increase a resolution of the system clock, wherein the interface clock has a higher frequency than the system clock;
tracking, using the timing information, relative drift as a function of time between the system clock and the interface clock, wherein the interface clock is coordinated with a second interface clock in a second electronic device based on time-coordination information received, from an interface circuit in the electronic device, in packets associated with the second electronic device;
determining, based on the relative drift, an estimated time offset between the interface clock and the system clock at a future time, which was received from the interface circuit, when the electronic device is to perform the playback operation;
modifying the future time based on the estimated time offset to determine a corrected future time; and
performing the playback operation at the corrected future time.

### Claim 16 (depends on 15)

The method of claim 15, wherein, prior to performing the playback operation, the method further comprises:
disabling interrupts in the electronic device; and
occupying at least a portion of a software stack by executing a loop to reduce a latency associated with performing the playback operation.

### Claim 17 (depends on 15)

The method of claim 15, wherein the capturing of the timing information involves storing time values of the interface clock in a register or a counter.

### Claim 18 (depends on 15)

The method of claim 15, wherein the method further comprises:
receiving, from the interface circuit, additional packets that include audio data in payloads;
storing the audio data in a queue; and
wherein the performing of the playback operation involves outputting the audio data from the queue.

### Claim 19 (depends on 15)

The method of claim 15, wherein the capturing, the tracking, the determining and the modifying coordinate the playback operation within a predefined value of the clock domain of the second interface clock.

### Claim 20 (depends on 15)

The method of claim 15, wherein the second electronic device is a master and the electronic device is a slave.